A simple method of electrochemical deposition was adopted to fabricate super-hydrophobic ZnO surface. A contact angle for water of 159.9° was achieved through teflon 1600 modification. The impacts of deposit time...
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ISBN:
(纸本)9781424457977
A simple method of electrochemical deposition was adopted to fabricate super-hydrophobic ZnO surface. A contact angle for water of 159.9° was achieved through teflon 1600 modification. The impacts of deposit time and operating voltage on the hydrophobic characteristics and the capacitance characteristics of ZnO layer were also analyzed.
The diffusion barrier properties of Co/TaN bilayer as Cu adhesion layer/diffusion barrier on the Si and low k (k=2.5) substrates were investigated. The barrier was prepared by using ion-beam sputtering technique. The ...
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ISBN:
(纸本)9781424457977
The diffusion barrier properties of Co/TaN bilayer as Cu adhesion layer/diffusion barrier on the Si and low k (k=2.5) substrates were investigated. The barrier was prepared by using ion-beam sputtering technique. The barrier property was investigated by sheet resistance, X-ray diffraction (XRD), and Auger electron spectroscopy (AES) and electrical measurements. No obvious Cu diffusion and agglomeration was observed after annealing at 500℃ for 30 min. Results show that Co/TaN has a good potential as cost effective adhesion/diffusion stack in copper metallization.
We propose FSK/ASK re-modulation WDM-PON with coherent receiver. Apparent BER improvement is obtained by utilizing FSK image rejection receiver, especially for long distance transmission. Parameters in image rejection...
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ISBN:
(纸本)9780819485564
We propose FSK/ASK re-modulation WDM-PON with coherent receiver. Apparent BER improvement is obtained by utilizing FSK image rejection receiver, especially for long distance transmission. Parameters in image rejection receiver which affect the system performance are analyzed. Results show that the presented scheme is promising in super long reach access network.
This paper proposes a novel multi-core processor with SIMD(Single Instruction Multiple Data) ISA (Instruction Set Architecture) and extended register file for communication applications. To acquire better parallel com...
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This paper proposes a novel multi-core processor with SIMD(Single Instruction Multiple Data) ISA (Instruction Set Architecture) and extended register file for communication applications. To acquire better parallel computing capability, we implement SIMD ISA and increase the number of register file from 32 to 64. 5×5 homogeneous 2-D mesh NoC (Network-onChip) topology is adopted to further enhance the parallelism, scalability and programmability. RS (Reed-Solomon) (255,239,8) decoding algorithm is implemented to evaluate the performance. Simulation result shows it could achieve 2.175 Gbps of throughput in worst case of RS 8-error incoming codeword under a maximum 350MHz clock frequency at SMIC 0.13um worst process corner, and the throughput is higher than other published implementations.
This paper proposed a VLSI architecture of resisting long echo channel estimation which is based on the algorithm proposed in [1]. FFT module reusing and clock gating are used in order to reduce the hardware complexit...
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This paper proposed a VLSI architecture of resisting long echo channel estimation which is based on the algorithm proposed in [1]. FFT module reusing and clock gating are used in order to reduce the hardware complexity and power consumption. The synthesis results show that the area can be reduced to only 65.5% of architecture in which FFT modules are not be reused. And the power can also be reduced a lot (the Design Compiler result shows that the power of the scheme can reduced to 29.6% of that before optimization).
This paper presents a 32-bit vector multiplyaccumulate (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 32x32, one 32x16, two 16x16, four 8×8 bit signed/unsigned multip...
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This paper presents a 32-bit vector multiplyaccumulate (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 32x32, one 32x16, two 16x16, four 8×8 bit signed/unsigned multiply-accumulate using Booth encoding algorithm and Wallace tree compressing. A reconfigurable Booth encoding array is implemented using 8×8 Booth unit as the basic element, and longer bit modes are obtained by combining these elements selectively. This MAC unit can also perform multiply between scalar and vector operands. 32-bit SIMD (Single Instruction Multiple Date) extended ISA (Instruction Set Architecture) and 3-stage pipeline are implemented for the MAC unit. The design is synthesized in 0.13μm SMIC technology under worst case condition, and the critical path of MAC is 2.5ns.
This paper presents a fully programmable frame synchronization architecture of OFDM systems implemented on a multi-core processor platform. By utilizing the guard interval in OFDM signals, the coarse symbol synchroniz...
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This paper presents a fully programmable frame synchronization architecture of OFDM systems implemented on a multi-core processor platform. By utilizing the guard interval in OFDM signals, the coarse symbol synchronization (CSS) and the fractional carrier frequency offset estimation (CFO) are considered simultaneously. The multi-core processor platform is a 2-Dimension mesh array of SIMD (Single Instruction Multiple Data) cores, and is well suited for digital communication applications. By exploring the task-level parallelism on many cores, data-level parallelism on SIMD cores, minimization of memory access, and route-lengthminimized task mapping techniques, the implementation can achieve a throughput up to 224Mbps, which shows the great advantage of multi-core processor platform.
A 100 MHz high resolution ultrasonic micro-transducer with a focal lens is designed for medical imaging based on monocrystalline lithium niobate (LiNbO3) 36°/Y-cut. Finite element analysis is used to characterize...
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We propose a single-side band (SSB) Radio-over-Fiber (RoF) system based on OFDM-MSK modulation. Inphase/quadrature-phase (IQ) imbalance effect can significantly degrade the system performance. In order to obtain a bet...
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We propose a single-side band (SSB) Radio-over-Fiber (RoF) system based on OFDM-MSK modulation. Inphase/quadrature-phase (IQ) imbalance effect can significantly degrade the system performance. In order to obtain a better system performance, at the transmitter, the phase departure tolerance should be within 1 degree and the amplitude departure tolerance within 5% in the electrical domain, while in the optical domain, 10 degrees and 40%, respectively. At the receiver, the phase departure tolerance should be within 2 degrees and the amplitude departure tolerance within 10%.
For the first time, we propose and demonstrate a novel parallel and Interlaced bandwidth allocation scheme in alloptical sub-banding WDM-OFDM PON system. By simulation, we successfully realize three dimensional resour...
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For the first time, we propose and demonstrate a novel parallel and Interlaced bandwidth allocation scheme in alloptical sub-banding WDM-OFDM PON system. By simulation, we successfully realize three dimensional resource allocation flexibly among optical network Unites (ONUs).
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