This paper proposes a low power convolver in channel estimation. It works in the time domain. Ram is used instead of register chains in typical architectures. The power is compared when using different depth of rams. ...
详细信息
This paper proposes an AES algorithm against both differential power analysis and differential fault analysis and its hardware implementation. This new algorithm emphasizes the feature of defending hardware against tw...
详细信息
A novel data-aided timing acquisition scheme is proposed for UWB wireless communications. We adopt a two-stage strategy similar to the representative least-squares (LS) timing scheme. At the first stage, pulse-level t...
详细信息
A novel programmable security processor for cryptography algorithms is presented in this paper. The 16-bit length RISC-like instruction set and 3-stage pipeline provide low code density, low hardware cost and low powe...
详细信息
A low-cost cryptographic processor for security embedded system is presented in this paper. The processor, without any assistance of dedicated cryptographic coprocessors, is scalable and very efficient for popular cry...
详细信息
This paper presents the design of a direct conversion receiver front-end for UWB application. Its key feature is a wideband balun-coupled noise cancelling transconductance input stage, followed by double-balanced quad...
详细信息
Dimensioning wireless sensor networks requires formal methods to guarantee network performance and cost in any conditions. Based on network calculus, this paper presents a deterministic analysis method for evaluating ...
详细信息
This paper presents a 1-V 10bit 50MSPS Switched-Opamp (SO) S/H circuit, designed in 3.3V/1.8V 0.18m 1P6M CMOS technology, which could be used in wideband wireless transceivers. A new architecture of the low voltage sw...
详细信息
A 8-b 125MS/s pipelined Analog-to-Digital Converter (ADC) used in DVB-S2 is presented in this paper. Based on reviewing low-power design techniques of high speed ADCs, several technologies are used in the design inclu...
详细信息
This paper presents a robust RF front-end for 3.1-4.8-GHz direct-conversion Ultra-wideband（UWB） applications such as the MB-OFDM *** circuits contain a gain controllable low-noise amplifier（LNA） with resistive fee...
详细信息
ISBN:
(纸本)9781424421855
This paper presents a robust RF front-end for 3.1-4.8-GHz direct-conversion Ultra-wideband（UWB） applications such as the MB-OFDM *** circuits contain a gain controllable low-noise amplifier（LNA） with resistive feedback,a merged quadrature mixer with static current injection,and local oscillator（LO） buffers. Post-layout simulations show that the fully differential front-end achieves a maximum conversion gain of 25.5dB and a minimum of 16.5dB,an input return loss of better than -SdB,a minimum noise figure of 4.5dB in high-gain mode and an input referred 3rd intercept point（IIP3） of -4.3dBm in low-gain mode while drawing 26.3mA current from a 1.8-V supply without the *** ESD protected chip is implemented in a 0.18-μm CMOS technology with an active area of 0.48mm.
暂无评论