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International Journal of Control and Automation 2014年第7期7卷 345-356页

作者： Deng, Fei Xie, Guangjun Cheng, Xin School of Electronic Science and Applied Physics Hefei University of Technology Hefei China State Key Lab of ASIC and System Fudan University Shanghai China

In this paper a buck-boost converter with adaptive voltage positioning (AVP) control technique is researched. According to the small-signal model of the converter, a constant output impedance required in AVP control is realized. Besides, the RHP zero in buck-boost converter is analyzed and the design of compensator to keep the system stable is presented. The converter is simulated in Simulink and the simulation results verify the above analysis. © 2014SERSC.

关键词： Buck-Boost converter

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RM-MAC: A Routing-Enhanced Multi-Channel MAC Protocol in Duty-Cycle Sensor Networks

RM-MAC: A Routing-Enhanced Multi-Channel MAC Protocol in Dut...

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IEEE International Conference on Communications

作者： Ye Liu Hao Liu Qing Yang Shaoen Wu National ASIC System Engineering Research Center Southeast University Suzhou Key Lab of Integrated Circuits & Systems Southeast University Department of Computer Science Montana State University Department of Computer Science Ball State University

ISBN: (纸本)9781467364300

Multi-channel media access control (MAC) is important in wireless sensor networks because it allows parallel data transmissions and resists external wireless interference. Existing multi-channel MAC protocols, however, do not efficiently support delay-sensitive applications that require reliable and timely data transmissions. In addition, multi-channel operation is inherently deficient for supporting multi-hop broadcasting, due to independent waking-up schedules on sensors. To address these issues, we present a routing-enhanced multi-channel MAC (RM-MAC) which allows nodes to coordinately select their channel polling times based on cross-layer routing information. RM-MAC also supports a ripple broadcast mechanism which achieves efficient multi-hop broadcast among sensors. Simulation results show that RM-MAC provides significant improvement over the MuCHMAC [1], in terms of end-to-end delay, under a wide range of traffic loads including both unicast and broadcast traffic.

关键词： Protocols Wireless sensor networks Interference

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DPALS: A dynamic programming-based algorithm for two-level approximate logic synthesis

DPALS: A dynamic programming-based algorithm for two-level a...

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International Conference on asic

作者： Chen Zou Weikang Qian Jie Han The State Key Lab of ASIC & System Fudan University Shanghai China UM-SJTU Joint Institute Shanghai Jiao Tong University Shanghai China Department of Electrical and Computer Engineering University of Alberta Edmonton AB Canada

Approximate circuit design is an emerging paradigm in which a designer deliberately changes the specified Boolean function to reduce area, delay, and/or power consumption of a circuit. This paper focuses on the synthesis of approximate logic circuits (or ALS) under a given error constraint. In particular, we consider ALS for a two-level design under an error rate constraint. A dynamic programming-based algorithm is proposed to find a nearly optimal approximate function by identifying the most promising set of cubes to be added to the on-set of the original function. Then, an off-the-shelf two-level logic synthesis tool is applied to further optimize the sum-of-product (SOP) expression. The experimental results show that the literal reduction is close to the optimal solution when the error rate constraint is tight and that more than 50% literal reduction is achieved for error rate below 0.8% for an 8-bit adder and a square root circuit.

关键词： Heuristic algorithms Algorithm design and analysis Error analysis Approximation algorithms Boolean functions Measurement Circuit synthesis

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Network-coding-based distributed relay scheme for PLC networks

Network-coding-based distributed relay scheme for PLC networ...

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International Conference on asic

作者： Jiaan Dai Xiaofang Zhou Linshan Zhang Gerald E. Sobelman State Key Lab of ASIC & System Fudan University Shanghai China YunNan Electric Power Science Test Research Institute Group Co. Ltd Department of Electrical and Computer Engineering University of Minnesota Minneapolis MN USA

Power Line Communication (PLC) is a communication technology that uses the existing distribution power grids for data transmission. Because of the high attenuation in the power line channel, transmission between two distant nodes must be done through relay technology. What's more, since strong noise exists in power grids the packet error rate may be high even when two nodes are close. This paper proposes a distributed relay scheme based on network coding that is designed for this high packet loss environment. Simulation results show that the proposed approach performs better than a fixed-path relay scheme in which only an end-to-end acknowledgement is enabled.

关键词： Relays Network coding Routing Low voltage Encoding Clustering algorithms Network topology

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A 32.5-GS/s two-channel time-interleaved CMOS sampler with switched-source follower based track-and-hold amplifier

A 32.5-GS/s two-channel time-interleaved CMOS sampler with s...

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2014 IEEE MTT-S International Microwave Symposium, IMS 2014

作者： Ma, Shunli Wang, Jiacheng Yu, Hao Ren, Junyan State Key Lab of ASIC and System Fudan University China School of Electrical and Electronic Engineering Nanyang Technological University Singapore

ISBN: (纸本)9781479938698

This paper presents a high speed and low distortion sampler with two-channel time-interleaved sampler with track-and-hold amplifier (THA). The THA is based on switched source-follower with active inductor load such that wide bandwidth in tack-mode and small signal feed-through in hold-mode can be both achieved within compact area. Furthermore, one clock-controlled auxiliary transistor is also introduced to cancel clock feed-through in hold-mode. The chip was fabricated in 65nm RF-CMOS process with core area of 0.07mm2 and power consumption of 192mW. The measured S-parameters show matched input and output up to 40GHz with 19.3GHz bandwidth in track-mode. The measured spurious-free-dynamic-range (SFDR) is 35dB, and total harmonic distortion (THD) is -30dB sampled at 16.26GS/s in one channel. © 2014 IEEE.

关键词： Scattering parameters

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An Ultra-Low Quiescent Current CMOS Low-Dropout Regulator with Small Output Voltage Variations

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Journal of Power and Energy Engineering 2014年第4期2卷 477-482页

作者： Xin Cheng Yizhong Yang Longjie Du Yang Chen Guangjun Xie School of Electronic Science and Applied Physics Hefei University of Technology Hefei China State Key Lab of ASIC and System Fudan University Shanghai China State Key Lab of ASIC and System Fudan University Shanghai China

An ultra-low quiescent current low-dropout regulator with small output voltage variations and improved load regulation is presented in this paper. It makes use of dynamically-biased shunt feedback as the buffer stage and the LDO regulator can be stable for all load conditions. The proposed structure also employs a momentarily current-boosting circuit to reduce the output voltage to the normal value when output is switched from full load to no load. The whole circuit is designed in a 0.18 μm CMOS technology with a quiescent current of 550 nA. The maximum output voltage variation is less than 20 mV when used with 1 μF external capacitor.

关键词： Ultra-Low Quiescent Current Low-Dropout Regulator Small Output Variations

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A scalable and reconfigurable 2.5D integrated multicore processor on silicon interposer

A scalable and reconfigurable 2.5D integrated multicore proc...

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Custom Integrated Circuits Conference (CICC)

作者： Jie Lin Shikai Zhu Zhiyi Yu Dongjun Xu P. D. Sai Manoj Hao Yu State Key Lab of ASIC and System Fudan University Shanghai P. R. China SYSU-CMU Joint Institute of Engineering Sun Yat-sen University Guangzhou P. R. China School of EEE Nanyang Technological University Singapore School of EEE Nanyang Technological University 639798 Singapore

This paper presents a novel 2.5D multicore processor which consists of 3 distinct silicon dies: a processor die with 8 MIPS-cores, a 16kB SRAM die, and an accelerator die for multimedia and communication applications. These dies are interconnected into multi-modes, like core-core (up to 32 cores), core-memory (4x storage capacity) and core-accelerator (4.4x speedup in H.264 decoder), to establish a scalable and reconfigurable platform with less tape-out die area cost. A pair of 8Gbps SerDes is custom designed for each of the 12 inter-die communication channels, achieving a 2.5D I/O bandwidth of 24GB/s. The processor was implemented in GF 65nm process, and operates at 500MHz under 1.2V supply, with 1.08W power dissipation.

关键词： Multicore processing Clocks Memory management Bandwidth Metals system-on-chip Decoding

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Investigation of scattering mechanisms for scaled mosfets

Investigation of scattering mechanisms for scaled mosfets

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International Conference on Solid-state and Integrated Circuit Technology

作者： Lin-Lin Wang Wu Peng Jian Zhang Yuan-Hui Fang Yu-Long Jiang State Key Lab of ASIC and System Fudan University Shanghai CHINA

ISBN: (纸本)9781479932849

The scattering mechanisms are investigated for MOSFETs with gate length varying from 1000 nm to 32 nm in this paper. Although the carrier mobility should theoretically be independent on the gate length, using the universal mobility model it is found that as the gate length reduces the Coulombic scattering decreases while the phonon scattering and the surface roughness scattering increase with a decreasing effective mobility. It is revealed that the decreasing effective substrate doping concentration N a related to the reduced threshold voltage V t is the dominant reason. However, the dominant mechanism varies from the Coulombic scattering for the long gate length to the phonon scattering for the short gate length at medium effective field (about 1 MV/cm).

关键词： MOSFET Abstracts Silicon Ear Scattering Phonons Microelectronics

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Effect of glycine on CMP process of molybdenum

Effect of glycine on CMP process of molybdenum

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International Conference on Solid-state and Integrated Circuit Technology

作者： Hui Feng Li-Ao Cao Xin-Ping Qu State Key lab of ASIC and System Fudan University Shanghai China

ISBN: (纸本)9781479932849

The effect of glycine on CMP of Mo using H 2 O 2 based alkaline slurry is investigated. It is found that both removal rate (RR) and static etch rate(SER)decrease after adding glycine into the alkaline slurry. Higher concentration of glycine results in a lower RR. The in-situ OCP experiment results reveal that after adding glycine into the slurry, the chemical reaction becomes weaker and less amount of oxide forms. The mechanism of glycine's inhibition to CMP of Mo is due to physical adsorption between the glycine molecule and the Mo surface.

关键词： Abstracts

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First-principle study of edge-modified ZGNRs and nickel contact

First-principle study of edge-modified ZGNRs and nickel cont...

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International Conference on Solid-state and Integrated Circuit Technology

作者： Lu Wang Zhi-Jun Qiu Ran Liu State Key Lab of ASIC & System Fudan University Shanghai CHINA

First-principle calculations were performed to investigate the resistance of nickel-ZGNRs(with H-terminated or bare edges) junctions. The edge modification contributes to reduce the resistance of the contact and cause... 详细信息

ISBN: (纸本)9781479932849

关键词： Abstracts Photonic band gap

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