A novel VLSI design and implementation of a low power 8-bit microcontroller using asynchronous logic is proposed in this paper. Taking advantage of the low power potential of asynchronous logic, the 2-stage pipeline M...
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(纸本)0780366778
A novel VLSI design and implementation of a low power 8-bit microcontroller using asynchronous logic is proposed in this paper. Taking advantage of the low power potential of asynchronous logic, the 2-stage pipeline MCU is carefully designed by chosen proper architecture as well as suitable asynchronous signal protocols which including a combination of a specific "Completion Detection Method" and "matching delay Method". Other low power design techniques such as "Gating Clock"also applied to the design. Using synchronous design flow and standard-cell library facilitates the VLSI design and circuit implementation. Fabricated in Chartered 0.6um CMOS technology, this low power asynchronous MCU achieves only 16% power dissipation of the conventional designed PIC16C61, which shares the same instruction set and function as the MCU we designed.
BST thin film is thought as the best candidate to substitute for SiO2thin film in high density DRAM application due to its high dielectric constant and low leakage current property. In this paper, (BaxSr1-x)TiO3(x=0-1...
This paper presents an improved technology for fabricating the integrated ferroelectric thin film capacitor. Using this technology the contact between PZT ferroelectric thin film and the top platinum electrode was gre...
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Metal/Ferroelectric/Insulator/Semiconductor (MFIS) field effect transistor was researched by using Si (100) as substrate, ZrO2 as insulator layer, Sol-Gel grown PZT film as ferroelectric material, Al as metal layer. T...
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The current-voltage (I-V) characteristics of nickel mono-silicide/n-Si Schottky diodes fabricated at different temperature and measured over a temperature range of 78 to 299 K have been interpreted on the basis of the...
Cubic and bisigmoidal interpolation methods are used for image scaling to improve the video quality. We have developed an efficient architecture with the hardware complexity reduced. The system is implemented and veri...
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Cubic and bisigmoidal interpolation methods are used for image scaling to improve the video quality. We have developed an efficient architecture with the hardware complexity reduced. The system is implemented and verified by the FPGA-based evaluation board.
A CMOS folding and interpolating analog-to-digital converter fully compatible with standard digital CMOS technology is described. Offset averaging reduces the input capacitance. Dynamic distributed sample-and-hold imp...
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A CMOS folding and interpolating analog-to-digital converter fully compatible with standard digital CMOS technology is described. Offset averaging reduces the input capacitance. Dynamic distributed sample-and-hold improves the dynamic performance of the A/D converter. Current-mode, fully differential and open-loop analog circuitry is used to achieve high speed. An 8-bit 125 MHz A/D converter with 100 MHz input bandwidth is realized in standard 0.35 um 3.3 V CMOS technology.
PbZr0.52Ti0.48O3 thin film prepared by metal-organic decomposition method was chemically etched by utilizing HF/HNO3 solution. Typical semiconductor processes were used to pattern the film. The dependence of the confo...
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A novel VLSI design and implementation of a low power 8-bit microcontroller using asynchronous logic is proposed in this paper. Taking advantage of the low power potential of asynchronous logic, the 2-stage pipelined ...
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A novel VLSI design and implementation of a low power 8-bit microcontroller using asynchronous logic is proposed in this paper. Taking advantage of the low power potential of asynchronous logic, the 2-stage pipelined MCU is carefully designed by chosen proper architecture as well as suitable asynchronous signal protocols which including a combination of a specific "Completion Detection Method" and "matching delay Method". Other low power design techniques such as "Gating Clock" also applied to the design. Using synchronous design flow and standard-cell library facilitates the VLSI design and circuit implementation. Fabricated in Chartered 0.6 um CMOS technology, this low power asynchronous MCU achieves only 16% power dissipation of the conventional designed PIC16C61, which shares the same instruction set and function as the MCU we designed.
ZrO2 thin film with suitable dielectric constant for MFIS FET's application was prepared by novel metal-organic-decomposition (MOD) method. The dielectric constants of the thin film laid between 10 and 30 and incr...
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