Dexterous robot manipulation has shone in complex industrial scenarios, where multiple manipulators, or fingers, cooperate to grasp and manipulate objects. When encountering multi-objective optimization with system co...
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Dexterous robot manipulation has shone in complex industrial scenarios, where multiple manipulators, or fingers, cooperate to grasp and manipulate objects. When encountering multi-objective optimization with system constraints in such scenarios, model predictive control(MPC) has demonstrated exceptional performance in complex multi-robot manipulation tasks involving multi-objective optimization with system constraints. However, in such scenarios, the substantial computational load required to solve the optimal control problem(OCP) at each triggering instant can lead to significant delays between state sampling and control application, hindering real-time performance. To address these challenges, this paper introduces a novel robust tube-based smooth MPC approach for two fundamental manipulation tasks: reaching a given target and tracking a reference trajectory. By predicting the successor state as the initial condition for imminent OCP solving, we can solve the forthcoming OCP ahead of time, alleviating delay effects. Additionally,we establish an upper bound for linearizing the original nonlinear system, reducing OCP complexity and enhancing response speed. Grounded in tube-based MPC theory, the recursive feasibility and closed-loop stability amidst constraints and disturbances are ensured. Empirical validation is provided through two numerical simulations and two real-world dexterous robot manipulation tasks, which shows that the seamless control input by our methods can effectively enhance the solving efficiency and control performance when compared to conventional time-triggered MPC strategies.
Abstract: The article studies the fault-tolerant self-timed (ST) counter design problem. Combinational ST circuits have a higher fault tolerance in comparison with synchronous counterparts due to redundant information...
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Abstract: The article considers the problem of developing synchronous and self-timed (ST) circuits that are tolerant to failures. Redundant ST coding and two-phase discipline ensures that ST circuits are more tolerant...
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Abstract: A system of Boolean equations can be solved by a sequential sampling method using an-step algorithm, where at theth step the values of all variables essential for the first equations are sampled and false so...
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The article researches the problem of self-timed (ST) binary counter implementation. ST circuits demonstrate correct operation over a much wider range of supply voltage and ambient temperature, in contrast to synchron...
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Within the article the issue of automatic synthesis of self-timed circuits from the original synchronous description in the Verilog language is covered. The key stage in the synthesis of a self-timed circuit is the pr...
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Self-timed (ST) circuits have a number of advantages over synchronous counterparts. They utilize natural interaction between digital units based on data availability. Combinational ST circuits use redundant coding of ...
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The article analyzes the correct implementation problem for self-timed latches and flip-flops with a composite write-enable input. Latch and flip-flop circuit implementation cases are described depending on the type o...
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Resource loss systems (ReLS) with signals, in which arrival of a signal triggers resource reallocation of a customer, are often used in the performance analysis of the contemporary mobile networks, especially those th...
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Self-Timed circuits are optimal for implementing computing systems operating under extreme conditions. They function reliably under any changes in environmental and power conditions, detect all constant faults, and ar...
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