Recently, there has been active progress in scaling semiconductor devices to reduce delay time and increase yield at the transistor level. However, this advancement is encountering a limitation in physical miniaturization. The monolithic 3D (M3D) integrated device technology is an emerging method to address this issue, which significantly enhances device packing density and minimizes via thickness [1]. One representation method for M3D integration technology involves depositing amorphous silicon (a-Si) onto the pre-existing lower device layer and then subjecting it to a thermal process to crystallize and form the upper active layer [2, 3]. However, achieving a highly crystalline silicon-based upper active layer with high performance necessitates a crystallization process conducted at elevated temperatures ranging from 700 to 900 °C. The primary constraint in achieving M3D integration technology is the requirement to utilize thermal processes below 450 °C to prevent damage to the lower device layer. When employing conventional thermal processes such as furnaces or rapid thermal processing to reach high temperatures, the duration of heat energy application is prolonged, and precise control over the depth of heat treatment becomes challenging. It can lead to thermal damage to the lower device layer. Furthermore, even after undergoing the crystallization process, the direction of crystal growth remains inconsistent, resulting in non-uniform electrical characteristics across different devices. This inconsistency poses challenges in realizing wafer-level M3D integrated device technology.

In this work, we propose a method to create a highly crystalline upper active layer without damaging the lower device layer by employing Si-Ge seeds and laser crystallization. Single-crystal Si-Ge seeds, which induce growth in specific crystal orientations during laser crystallization, were formed at a low temperature of 450 °C using the selective etch growth (SEG) method. Fol