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Bipolar/BiCMOS Circuits and Technology Meeting

作者： V.G. Oklobdzija Advanced Computer Systems Engineering Laboratory Department of Electrical and Computer Engineering University of California Davis CA USA

An ECL gate exhibiting an improved speed-power product over the circuits presented in the past is described. The improvement is due to a combination of a push-pull output stage driven by a controlled current source. This circuit has better driving capabilities and improved speed, yet it uses an order of magnitude less power than regular ECL gate. Fully bipolar realization of this circuit is also possible.

关键词： BiCMOS integrated circuits Logic Voltage Frequency Energy consumption Feedback circuits Power engineering computing Power engineering and energy systems engineering and theory Laboratories

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computer productivity initiative 7th

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7th Conference on Software engineering Education, SEI CSEE 1994

作者： Maly, Kurt J. Ray, Dennis E. Wild, J. Christian Levinstein, Irwin B. Olariu, Stephan Overstreet, C. Michael Rao, Nageswara S. V. Ireland, Tijen Kantsios, George Department of Computer Science Old Dominion University NorfolkVA23529-0162 United States Intelligent Systems Section Center for Engineering Systems Advanced Research Oak Ridge National Laboratory Oak RidgeTN37831-6364 United States

ISBN: (纸本)9783540574613

Over the last three decades computer science has evolved into a mature and experimentally oriented discipline with a well defined curriculum. Only recently have we come to realize that as a discipline computer science must reach beyond its own subject area to applications in other disciplines in order to stay relevant. Most computer science curricula teach principles and programming skills in isolation from an application perspective, provide limited laboratory experience, and introduce inadequate integration with non-CS components. The computer Productivity Initiative, described in this paper, proposes to alleviate these problems by integrating a multi-year project into the curriculum. The project involves courses normally taken in three different years of the curriculum. It includes hardware and software issues and also addresses engineering, business, and other non-CS issues. The initiative uses prototyping and simulations in the development of specifications for an integrated television communication and display computer system. The students apply principles of productivity and make extensive use of leading-edge technologies both in the process of the project development and the product being developed. They hone essential career-oriented skills in the areas of management, formal presentations, and group problem solving. This paper is a report of work in progress. It emphasizes the implementation issues we are facing and the integration of evaluation into our curriculum development. It describes our preparation for the dissemination of a model curriculum when we are able to demonstrate that the approach is adaptable to CS departments across the country. © Springer-Verlag Berlin Heidelberg 1994.

关键词： Productivity

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Average waiting time profiles of uniform DQDB model

Average waiting time profiles of uniform DQDB model

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IEEE Annual Joint Conference: INFOCOM, IEEE computer and Communications Societies

作者： N.S.V. Rao K. Maly S. Dharanikota S. Olariu L. Zhang D. Game Center for Engineering Systems Advanced Research Oak Ridge National Laboratory Oak Ridge TN USA Department of Computer Science Old Dominion University Norfolk VA USA

Considers a simple and uniform abstraction of the distributed queue dual bus (DQDB) system of N nodes to highlight the fairness issues in terms of average waiting time. For the uniform DQDB with equal distance between adjacent nodes, the authors show that the system operates under three basic behavior profiles and a finite number of their combinations that depend on the load of the network. Consequently, the system is not fair at any load in terms of the average waiting times. In the vicinity of a critical load of 1-4/N the uniform network runs into a state akin to chaos, where its behavior fluctuates from one extreme to the other with a load variation of 2/N. The analysis is supported by simulation results. The authors also show that the main theme of the analysis carries over to the general (non-uniform) DQDB.< >

关键词： Protocols Analytical models Throughput Telecommunication traffic Traffic control Delay estimation systems engineering and theory Laboratories Load management Metropolitan area networks

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Square-root arrays and Chandrasekhar recursions for H/sup /spl infin// problems

Square-root arrays and Chandrasekhar recursions for H/sup /s...

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IEEE Conference on Decision and Control

作者： B. Hassibi A.H. Sayed T. Kailath Advanced Research Projects Agency of the Department of Defense monitored Air Force Office of Scientific Research UK Department of Electrical and Computer Engineering University of California Santa Barbara CA USA Information Systems Laboratory University of Stanford Stanford CA USA

Using their previous observation that H/sup /spl infin// filtering coincides with Kalman filtering in Krein space the authors develop square-root arrays and Chandrasekhar recursions for H/sup /spl infin// filtering problems. The H/sup /spl infin// square-root algorithms involve propagating the indefinite square-root of the quantities of interest and have the property that the appropriate inertia of these quantities is preserved. For systems that are constant, or whose time-variation is structured in a certain way, the Chandrasekhar recursions allow a reduction in the computational effort per iteration from O(n/sup 3/) to O(n/sup 2/), where n is the number of states. The H/sup /spl infin// square-root and Chandrasekhar recursions both have the interesting feature that one does not need to explicitly check for the positivity conditions required of the H/sup /spl infin// filters. These conditions are built into the algorithms themselves so that an H/sup /spl infin// estimator of the desired level exists if, and only if, the algorithms can be executed.< >

关键词： Filters Riccati equations Hilbert space Estimation error State estimation Covariance matrix Recursive estimation Testing

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Spatial characteristics of human hand impedance in multi-joint arm movements

Spatial characteristics of human hand impedance in multi-joi...

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IEEE International Workshop on Intelligent Robots and systems (IROS)

作者： T. Tsuji K. Goto M. Moritani M. Kaneko P. Morasso Computer Science and Systems Engineering Hiroshima University Hiroshima Japan Hiroshima Daigaku Higashihiroshima Hiroshima JP Dept. of Comput. Sci. & Syst. Eng. Hiroshima Univ. Japan Laboratory for Integrated Advanced Robotics DIST-University of Genoa Genoa Italy

The present paper examines spatial characteristics of human hand impedance in multi-joint arm movements. While a subject maintains a hand location, small external disturbance to his hand is applied by a manipulandum. Time changes of the hand displacements and forces caused by the disturbance are measured and the hand impedance is estimated using a second-order linear model. The estimated hand impedance in different subjects and hand locations are summarized as follows: (1) spatial variations of the estimated hand impedance ellipses approximately agree with the experimental results of other researchers (Mussa-Ivaldi et at, 1985: Dolan et al., 1993), (2) the human hand inertia characteristics can be explained from basic biomechanics of the passive inertial effects (3) the grip force of the subject increases the size of the stiffness and viscosity ellipses, and (4) spatial features of the orientation. And the shape characteristics of the stiffness and viscosity ellipses are mostly explained from the kinematics point of view of the human arm.< >

关键词： Humans Impedance Viscosity Robots Kinematics Muscles Shape Control systems Man machine systems systems engineering and theory

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TECHNICAL ISSUES REGARDING SATELLITE PACKET-SWITCHING

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INTERNATIONAL JOURNAL OF SATELLITE COMMUNICATIONS 1994年第3期12卷 257-267页

作者： IVANCIC, WD CHU, P SHYY, DJ National Aeronautics and Space Administration Lewis Research Center Cleveland Ohio 44135 USA. A design engineer in the Digital Technology Branch of the Space Electronics Division. He has extensive experience in satellite communications systems modulation and coding on-board switching and routeing and high speed digital design. Since joining NASA in 1982 Mr. Ivancic has been responsible for the development of a variety of matrix switch controllers ground terminal equipment numerous pieces of special test equipment a beacon controller for the SARSAT program (Search and Rescue Satellite) and a time-shared decoder for a processing satellite. In addition Mr. Ivancic has been technical contract monitor on a number of advanced communications technology contracts including the Advanced Modulation Technology Development a 5 GHz fibre-optic link and multi-programmable modem study. He was awarded the B.S.E.E. and M.S.E.E. degrees by Cleveland State University in 1982 and 1986 respectively. Cleveland State University Cleveland Ohio 44115 USA. Currently an assistant professor of Electrical Engineering Department at Cleveland State University. He obtained the M.S. and Ph.D. degrees from Iowa State University majoring in Electrical and Computer Engineering. His research interests include high-speed computer networks digital systems and neural networks applications. He is a member of Sigma Xi Phi Kappa Phi as well as the IEEE and ACM. ComSearch Reston Virginia 22091 USA. Received the B.S. degree in electrical engineering from National Chiao-Tung University Hsin-Chu Taiwan in 1983 and the M.S. and Ph.D. degrees in electrical engineering from Georgia Institute of Technology Atlanta GA in 1986 and 1990 respectively. From June 1987 to October 1987 he worked for the Department of Neurology Emory University Atlanta as a Programmer. From September 1989 to December 1989 he worked for the Advanced Development Laboratory. AMP Inc. Atlanta as a Test Engineer. From February 1990 to August 1993 he wor

Many concepts for advanced communication satellite networks have recently been proposed. Critical technical issues relating to satellite packet switching for meshed very small aperture terminal networks and broadband ... 详细信息

关键词： FAST PACKET SWITCH BISDN MESHED VSAT ON-BOARD PROCESSING

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PDAS: Processor design automation system

PDAS: Processor design automation system

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European Design Automation Conference

作者： I. Pyo A.M. Despain Advanced Computer Architecture Laboratory Department of Electrical Engineering-Systems University of Southern California USA

The PDAS (Processor Design Automation System) is a new approach to design automation that uses formal methods to achieve a new level of design power and the ability to formally validate designs. The idea is to develop a design automation system which considers both microprocessor hardware design and design of the corresponding language compiler concurrently. Benchmark programs are used to motivate design decisions and optimize performance. Compiler optimizations are considered during the design of hardware. The system spans language design, compiler design, instruction set design, microarchitecture, and VLSI implementation.< >

关键词： Personal digital assistants Design automation Natural languages Specification languages Hardware Design optimization Process design Formal languages Concrete computer architecture

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Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors 93

Hardware/software resolution of pipeline hazards in pipeline...

引用

IEEE International Conference on computer-Aided Design

作者： I.-J. Huang A.M. Despain Advanced Computer Architecture Laboratory Department of Electrical Engineering-Systems University of Southern California USA

ISBN: (纸本)9780818644900

One major problem in pipeline synthesis is the detection and resolution of pipeline hazards. We present a new solution to the problem in the domain of pipelined application-specific instruction set processors, based on hardware/software concurrent engineering approach. An extended taxonomy of inter-instruction dependencies is proposed for the analysis of pipeline hazards. Hardware/software resolution candidates are then associated with these dependencies. Algorithms using the taxonomy and the resolutions are developed to detect and resolve pipeline hazards, and to explore the hardware and software design space. Application benchmarks are used to evaluate the designs and guide the design decision. The power of these tools are demonstrated through the pipeline synthesis of two processors including industrial one. Compared with other approaches, our method achieves higher throughput, and provides a way to explore the hardware/software tradeoff. Our method can be combined with current approaches to achieve even higher performance since they are orthogonal.

关键词： Hardware Hazards Pipeline processing Taxonomy Delay Application software Throughput Space exploration computer architecture Laboratories

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A microarchitectural performance evaluation of a 3.2 Gbyte/s microprocessor bus 26

A microarchitectural performance evaluation of a 3.2 Gbyte/s...

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IEEE/ACM International Symposium on Microarchitecture (MICRO)

作者： Tim Stanley Michael Upton Patrick Sherhart Trevor Mudge Richard Brown Advanced Computer Architecture Laboratory Department of Electrical Engineering-Systems University of Southern California USA Department of Electrical Computer Engineering Drexel University Philadelphia PA USA Advanced Computer Architecture Laboratory Department of Electrical Engineering and Computer Science University of Michigan Ann Arbor Michigan

ISBN: (纸本)9780818652806

The conventional classification of inter-instruction dependencies (data, anti and output dependencies) provides a basic scheme for the analysis of pipeline hazards in pipelined instruction set processors. However, it does not consider the relative spatial positions of micro-operations in the pipeline, thus providing limited hints to hardware designers and compiler writers about the hazard resolution in generalized pipeline structures. The authors propose an extension to the conventional classification of dependencies, which is capable of encapsulating the spatial/temporal relationship and providing precise hardware/software resolution strategies. With the extended classification and its associated hardware/software resolution strategies, they are able to systematically analyze the potential register-related pipeline hazards for a given pipeline structure, determine appropriate resolution strategies, and explore the tradeoff between hardware and software complexities. The methodology enables the systematic synthesis of high performance pipelined micro-architectures, and is useful to derive the back-end of the supporting compilers.< >

关键词： Hazards Pipeline processing Hardware Application software computer architecture Laboratories High level synthesis Design automation Throughput System performance

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Using Custom-designed VLSI Fuzzy Inferencing Chips for the Autonomous Navigation of A Mobile Robot

Using Custom-designed VLSI Fuzzy Inferencing Chips for the A...

引用

1992 IEEE/RSJ International Conference on Intelligent Robots and systems, IROS 1992

作者： Pin, F.G. Watanabe, H. Symon, J. Pattay, R.S. Center for Engineering Systems Advanced Research Oak Ridge National Laboratory Oak RidgeTN37831-6364 United States Department of Computer Science University of North Carolina at Chapel Hill Chapel HillNC27599 United States

ISBN: (纸本)0780307372

An approach merging the concepts of fuzzy logic and sensor-based behaviors has been developed to add a qualitative reasoning capability to the real-time control of autonomous mobile robots. The approach is implemented using custom-designed computer boards which include recently developed VLSI fuzzy inferencing chips. The design and operation of these boards are first described and an example of their use for the autonomous navigation of a mobile robot is presented. The development of qualitative reasoning schemes emulating humanlike navigation in a-priori unknown environments is discussed. The approach using superposition of elemental sensor-based behaviors expressed in the fizzy Sets theoretic framework is shown to allow easy development and testing of the inferencing rule base, while providing for progressive addition of behaviors to resolve situations of increasing complexity. The efficiency of such schemes, which can consist of as little as a dozen qualitative rules, is illustrated in experiments involving an autonomous mobile robot navigating on the basis of very sparse and inaccurate sensor data. © 1992 IEEE.

关键词： Mobile robots

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