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International Conference on VLSI Design

作者： S. Das S.C. Nandy B.B. Bhattacharya Department of Computer Science & Appl. North Bengal University Darjeeling India Advanced Computing & Microelectronics Unit Indian Statistical Institute Calcutta India

In this paper, we present a new approach to MCM routing to minimize the number of vias and wire length. A 3D routing substrate is partitioned into a number of layers. Chip blocks are placed on the top layer, and routing layers are used pair-wise for interconnections. The set of projected pins of the blocks on a routing layer plays the role of obstacles; the space (river) between two consecutive rows/columns of blocks is used for routing. The proposed algorithm consists of a preprocessing stage that determines a routing order among the nets. For each net, a rectilinear Steiner tree with a minimum number of bends is constructed, and the nets are ordered on the basis of a metric called average path length. Next, routing is done in the nonoverlap model, using a heuristic guided by the above ordering. Finally, via minimization is achieved by slightly re-routing the nets in the overlap model. Experimental evidence on standard benchmarks reveals that our solution produces significantly fewer number of vias, and compares favourably with respect to wire length against the best known existing results.

关键词： Routing Wire Integrated circuit interconnections Costs Delay Pins Rivers Minimization Packaging Fabrication

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Ranking of Optical Character Prototypes in a Large Database Using Isothetic Chord Lengths

Ranking of Optical Character Prototypes in a Large Database ...

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International Conference on computing: Theory and Applications, ICCTA

作者： Partha Bhowmick Arindam Biswas Bhargab B. Bhattacharya Computer Science & Technology Dept Bengal Engineering and Science University Shibpur India Advanced Computing & Microelectronics Unit Indian Statistical Institute Kolkata India

A novel algorithm for conferring a ranking system on the prototypes of a large database of optical/handwritten characters is proposed. The ranking system is designed using the (isothetic) chord lengths of the enclosing isothetic polygons corresponding to the prototypes, for a prescribed grid-size. As the derivation of structural information of a character by thinning or by edge detection is susceptible to its impurity during imaging or post-processing, an isothetic polygon is used that captures the geometric structure of the character in an elegant way. The proposed scheme has a striking potential in deciding the relative merit and usefulness of a particular prototype with respect to the other prototypes of the corresponding character in the concerned database. Several quantitative measures have been suggested, and supporting experimental results have been reported, which justify the strength and efficiency of the proposed method

关键词： Prototypes Spatial databases Optical character recognition software Character recognition Computer science Data engineering Design engineering Optical computing microelectronics Image edge detection

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Locating objects in a sensor grid

Lecture Notes in Computer Science (including subseries Lectu...

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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2004年 3326卷 526-531页

作者： Sau, Buddhadeb Mukhopadhyaya, Krishnendu Department of Mathematics Jadavpur University Kolkata - 700032 India Advanced Computing and Microelectronics Unit Indian Statistical Institute 203 B. T. Road Kolkata - 700108 India

Finding the location of an object, other than the sensor in a sensor network is an important problem. There is no good technique available in the literature to find the location of objects. We propose a technique to find the location of objects in a sensor grid. The locations of the sensors are assumed to be known. A sensor can only sense the number of objects present in its neighborhood. This small information injects low traffic in the network. The computations are carried out completely in the base station. © Springer-Verlag Berlin Heidelberg 2004.

关键词： Location

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Voting in Watts-Strogatz Small-World Network

Voting in Watts-Strogatz Small-World Network

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International Conference on Frontiers in computing and Systems, COMSYS 2020

作者： Ray, Soujanya Chatterjee, Kingshuk Majumdar, Ritaji Ganguly, Debayan Department of Computer Science and Engineering Netaji Subhash Engineering College Kolkata India Department of Computer Science Government College of Engineering and Ceramic Technology Kolkata India Advanced Computing and Microelectronics Unit Indian Statistical Institute Kolkata India Department of Computer Science Government College of Engineering and Leather Technology Kolkata India

ISBN: (纸本)9789811578335

Social network science and social interaction science is an interesting and steadily growing field of research in current time. Social network influences the lives of millions, and therefore the propagation of influence in such a network deserves study. In this paper, we have studied voting in a Watts-Strogatz small-world network for two parties. In our model, each node has an initial bias towards one of the parties (or can be neutral) and are influenced by their neighbours to vote for a particular party. We show via simulation that (i) for linear of logarithmic voting function, the small-scale variation is minimum, but the majority of the nodes tend to align towards one of the parties in the long term, (ii) for periodic voting function, the small-scale variations are sharp and oscillating, but in the long term the number of voters in each party roughly remains the same, (iii) the degree of the graph does not seem to have a strong influence on the result, and (iv) networks with higher small-world probability tend to resist the alignment of voters towards a particular party for a longer time as compared to networks with lower small-world probability. This majority voting model seems to efficiently capture the potential behaviour of voters on small-world network over a campaigning period. © 2021, Springer Nature Singapore Pte Ltd.

关键词： Small-world networks

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Fault Coverage of a Test Set on Structure-Preserving Siblings of a Circuit-Under-Test

Fault Coverage of a Test Set on Structure-Preserving Sibling...

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Asian Test Symposium (ATS)

作者： Manobendra Nath Mondal Animesh Basak Chowdhury Manjari Pradhan Susmita Sur-Kolay Bhargab B. Bhattacharya Advanced Computing & Microelectronics Unit Indian Statistical Institute Kolkata India Centre for Cyber-Security New York University USA Dept. of CSE Indian Institute of Technology Kharagpur India

ISBN: (数字)9781728126951

ISBN: (纸本)9781728126968

Most of the Automatic Test Pattern Generation (ATPG) algorithms for digital circuits rely heavily on netlist description that comprises both network interconnect structure among logic gates and the functionality of each gate. The performance of an ATPG tool on a circuit-under-test (CUT) C is determined by the size of the test set T and its fault coverage (FC). Despite extensive research in the field of testing, the following question remains unanswered: Is the structure or the functionality of C dominant in determining FC of a test-set T for C? In this paper, we present empirical evidence in favour of the dominance of structure on FC by randomly selecting a logic gate from a synthesized netlist for C, and replacing it by a different type of gate. Our experiments provide an un-intuitive result that F C of a test-set T for C under the single stuck-at fault model remains nearly the same on other sibling circuits that have identical structure as of C but with different gate functionality, provided these have similar extent of fault redundancy. This observation supports the view that feeding structural information alone may suffice to train machine-learning models that are currently being used to expedite different problems of digital circuit testing and diagnosis.

关键词： Circuit faults Logic gates Redundancy Sociology Statistics Integrated circuit modeling Tools

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A New Look Ahead Technique for Customized Testing in Digital Microfluidic Biochips

A New Look Ahead Technique for Customized Testing in Digital...

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Asian Test Symposium (ATS)

作者： Pranab Roy Hafizur Rahaman Parthasarthi Dasgupta Bhargab B.B. Bhattacharya School of VLSI Technology Bengal Engineering and Science University Shibpur Shibpur India Indian Institute of Management Calcutta India Advanced Computing and Microelectronics Unit Indian Statistical Institute Calcutta India

Digital Micro fluidic biochips have been developed as a promising platform for Lab-on-chip systems that manipulate individual droplet of chemicals on a 2D planar array of electrodes. Due to the significance of the correctness of the results -- fault tolerance and dependability becomes a major issue for operation of these devices. Therefore, such devices are required to be tested frequently both off-line (e.g., post manufacturing) and concurrently ahead of each assay execution. Under both scenarios, testing is accomplished by routing one or more test droplets across the chip simultaneously and recording their arrival at the destination. In this paper we attempted to solve the problem of customized testing for a given Bioassay layout. We have applied a look ahead strategy for parallel testing using multiple droplets for any given test bench with an objective of minimization of test completion time and optimized utilization of test resources. The test simulations are carried out on test benches of Benchmark suite III and results obtained are found to be encouraging.

关键词： Testing Routing Microfluidics Arrays Electrodes Circuit faults Schedules

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Validation of a DiffServ based QoS model implementation for real-time traffic in a test bed

Validation of a DiffServ based QoS model implementation for ...

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National Conference on Communications (NCC)

作者： Sruti Gan Chaudhuri C. S. Kumar Ratnam V. RajaKumar Advanced Computing and Microelectronics Unit Indian Statistical Institute Kolkata India Department of Mechanical Engineering Indian Institute of Technology Kharagpur India Department of Electronics and Electrical Communication Engineering Indian Institute of Technology Kharagpur India

This paper presents a DiffServ based adaptive QoS model for real-time interactive traffic in constrained bandwidth IP network without over provisioning the users. A WRR based QoS scheduling algorithm has been implemented to allocate the network resources to the users. A tuning parameter for VBR real-time traffic is also introduced in order to provide fair performance to the non real-time traffic as well. The QoS model is implemented at the transmitter edge of the network. Edge switches and routers are configured with the proposed algorithm. The simulation (using NS2) and experimental results (using a test bed with real time network scenario) are presented for validation of the proposed model.

关键词： Quality of service Real time systems Bandwidth Diffserv networks Delay Streaming media Adaptation models

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Analytical framework to compare handover mechanisms for fog-enabled IoT networks

Analytical framework to compare handover mechanisms for fog-...

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IEEE Future Networks World Forum (FNWF)

作者： Sanjay Sathish Shankar K. Ghosh Sasthi C. Ghosh Department of Computer Science and Engineering Shiv Nadar Institution Of Eminence Delhi NCR India Advanced Computing & Microelectronics Unit Indian Statistical Institute Kolkata India

Frequent handover failures in fog enabled Internet of things (IoT) networks cause repetition of one or more phases of a job in the new fog node, resulting in high job completion time and lower service rate. In this work, an analytical framework has been proposed to measure the performances of different handover algorithms for fog networks in terms of job completion per unit time as well as service rate. Our analysis considers the effect of handover failure, request arrival rates and sizes of the jobs. Moreover, we have proposed a handover algorithm considering both the received signal strength as well as the available computing resources in neighbouring fog nodes. The goal of the proposed handover algorithm is to minimize handover failure and to improve service rate. Both analytic and simulation results show that the proposed handover algorithm outperforms the existing approaches in terms of job completion delay and service rate.

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Demand-driven single- and multitarget mixture preparation using digital microfluidic biochips

Demand-driven single- and multitarget mixture preparation us...

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作者： Shalu Kumar, Srijan Singla, Ananya Roy, Sudip Chakrabarty, Krishnendu Chakrabarti, Partha P. Bhattacharya, Bhargab B. CoDA Laboratory Department of Computer Science and Engineering Indian Institute of Technology Roorkee Roorkee247667 India Department of Computer Science Stanford University StanfordCA94305 United States Department of Electrical and Computer Engineering Duke University Durham27708 United States Department of Computer Science and Engineering Indian Institute of Technology Kharagpur Kharagpur721302 India Advanced Computing and Microelectronics Unit Indian Statistical Institute Kolkata Kolkata700108 India

Recent studies in algorithmic microfluidics have led to the development of several techniques for automated solution preparation using droplet-based digital microfluidic (DMF) biochips. A major challenge in this direction is to produce a mixture of several reactants with a desired ratio while optimizing reactant cost and preparation time. The sequence of mix-split operations that are to be performed on the droplets is usually represented as a mixing tree (or graph). In this article, we present an efficient mixing algorithm, namely, Mixing Tree with Common Subtrees (MTCS), for preparing single-target mixtures. MTCS attempts to best utilize intermediate droplets, which were otherwise wasted, and uses morphing based on permutation of leaf nodes to further reduce the graph size. The technique can be generalized to produce multitarget ratios, and we present another algorithm, namely, Multiple Target Ratios (MTR). Additionally, in order to enhance the output load, we also propose an algorithm for droplet streaming called Multitarget Multidemand (MTMD). Simulation results on a large set of target ratios show that MTCS can reduce the mean values of the total number of mix-split steps (Tms) and waste droplets (W) by 16% and 29% over Min-Mix (Thies et al. 2008) and by 22% and 34% over RMA (Roy et al. 2015), respectively. Experimental results also suggest that MTR can reduce the average values of Tms andW by 23% and 44% over the repeated version of Min-Mix, by 30% and 49% over the repeated version of RMA, and by 9% and 22% over the repeated-version of MTCS, respectively. It is observed that MTMD can reduce the mean values ofTms andW by 64% and 85%, respectively, over MTR. Thus, the proposed multitarget techniques MTR and MTMD provide efficient solutions to multidemand, multitarget mixture preparation on a DMF platform. © 2018 ACM.

关键词： Digital microfluidics

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Synthesis Techniques for Ternary Quantum Logic

Synthesis Techniques for Ternary Quantum Logic

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International Symposium on Multiple-Valued Logic

作者： Sudhindu Bikash Mandal Amlan Chakrabarti Susmita Sur-Kolay A. K. Choudhury School of Information Technology University of Calcutta Kolkata India Advanced Computing & Microelectronics Unit Indian Statistical Institute Kolkata India

Synthesis of ternary quantum circuits involves basic ternary gates and logic operations in the ternary quantum domain. Works that define ternary algebra and their applications for ternary quantum logic realization, are very few. In this paper, we express a ternary logic function in terms of projection operations including a new one. We demonstrate how to realize a few new multi-qutrit ternary gates in terms of generalized ternary gates and projection operations. We then employ our synthesis method to design ternary adder circuits which have better cost than that obtained by earlier method.

关键词： Logic gates Quantum computing Adders Multivalued logic Quantum mechanics Algebra Cryptography

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