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检索条件"机构=Advanced Memory Process Development Center Memory Division"
共 77 条 记 录，以下是61-70 订阅
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Ultimate solution for low thermal budget gate spacer and etch stopper to retard short channel effect in sub-90 nm devices
Ultimate solution for low thermal budget gate spacer and etc...
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Symposium on VLSI Technology
作者： Jong-Ho Yang Jae-Eun Park Joo-Won Lee Kang-Soo Chu Ja-Hum Ku Moon-Han Park Nae-In Lee Hee-Sung Kang Myung-Hwan Oh Jun-Ha Lee Ho-Kyu Kang Kwang-Pyuk Suh Advanced Process Development Project Samsung Electronics Co. Ltd. Yonzin-City Kyungai-Do Korea System LSI Division Samsung Electronics Co. Ltd. South Korea System LSI Division Samsung Electronics Co. Ltd. Memory Division Samsung Electronics Co. Ltd.
For the first time, by employing low thermal budget processes of ALD SiO/sub 2/ and ALD SiN as gate spacer and silicide blocking layer, the short channel effects of CMOSFETs are significantly suppressed. Using the ALD... 详细信息
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Future 1T1C FRAM technologies for highly reliable, high density FRAM
Future 1T1C FRAM technologies for highly reliable, high dens...
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International Electron Devices Meeting (IEDM)
作者： S.Y. Lee K. Kim Advanced Technology Development Semiconductor Research and Development Center Memory Division Samsung Electronics Company Limited Yongin si Gyeonggi South Korea
Recent 32 Mb FRAM technologies realizing 0.25 /spl mu/m/15F2 cell are introduced and key integration technologies for future highly reliable, high density FRAM are suggested. Etchless capacitor technology and MOCVD PZ... 详细信息
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Mass production worthy HfO2-Al2O3 laminate capacitor technology using Hf liquid precursor for sub-100 nm DRAMs
Mass production worthy HfO2-Al2O3 laminate capacitor technol...
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2002 IEEE International Devices Meeting (IEDM)
作者： Lee, Jung-Hyoung Kim, Jong Pyo Lee, Jong-Ho Kim, Yun-Seok Jung, Hyung-Seok Lee, Nae-In Kang, Ho-Kyu Suh, Kwang-Pyuk Jeong, Mun-Mo Hyun, Kyu-Taek Baik, Hion-Suck Chung, Young Su Liu, Xinye Ramanathan, Sasangan Seidel, Tom Winkler, Jerald Londergan, Ana Kim, Hae Young Ha, Jung Min Lee, Nam Kyu Advanced Process Development Project System LSI Business Samsung Electronics Co. Ltd. San #24 Nongseo-Ri Kiheung-Eup Yongin-City Kyunggi-Do 449-711 Korea Republic of DRAM PA Team Memory Business Samsung Electronics Suwon Korea Republic of AE Center Samsung Adv. Inst. of Technology Gyungyi-Do Korea Republic of Genus Inc. 1139 Karlstad Dr. Sunnyvale CA 94089 United States
For the first time, we successfully demonstrated MIS capacitor with ALD (Atomic Layer Deposition) grown HfO2-Al2O3 laminate film using Hf liquid precursor (Hf(NEtMe)4) with EOT of 22.5 Å and acceptable leakage cu... 详细信息
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Robust ternary metal gate electrodes for dual gate CMOS devices
Robust ternary metal gate electrodes for dual gate CMOS devi...
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International Electron Devices Meeting (IEDM)
作者： Dae-Gyu Park Tae-Ho Cha Kwan-Yong Lim Heung-Jae Cho Tae-Kyun Kim Se-Aug Jang You-Seok Suh Veena Misra In-Seok Yeo Jae-Sung Roh Jin Won Park Hee-Koo Yoon Advanced Process Team Memory Research and Development Division Hynix Semiconductor Inc. Ichon Kyunggi South Korea Department of Electrical Engineering North Carolina State University Raleigh NC USA
This report describes thermally stable dual metal gate electrodes for surface channel Si CMOS devices. We found that the ternary metal nitrides, i.e., Ti/sub 1-x/Al/sub x/N/sub y/ (TiAlN) and TaSi/sub x/N/sub y/ (TaSi... 详细信息
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Backend process for Cylindrical Ru/Ta2O5/Ru Capacitor for Future DRAM
Backend Process for Cylindrical Ru/Ta2O5/Ru Capacitor for Fu...
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2001 6～(th) International Conference on Solid-State and Integrated Circuit Technology
作者： J.Lin T.Suzuki H.Minakata A.Shimada K.Tsunoda M.Fukuda T.Kurahashi Y.Fukuzumi A.Hatada A.Sato P.H.Sun Y.Ishibashi H.Tomita N.Nishikawa E.Ito W.C.Liu C.M.Chu R.Suzuki M.Nakabayashi D.Matsunaga K.Hieda K.Hashimoto S.Nakamura Y.Kohyama C.M.Shiah Technology Development Division Fujitsu Limited Technology Development Division Fujitsu Limited Fujitsu Laboratories Limited Technology Development Division Fujitsu Limited Fujitsu Laboratories Limited Fujitsu Laboratories Limited Fujitsu Laboratories Limited Memory LSI R&D Center Toshiba Corporation Fujitsu Laboratories Limited Fujitsu Laboratories Limited DRAM Process Integration and Module Technology Department Winbond Electronics Corporation Memory LSI R&D Center Toshiba Corporation Process&Manufacturing Engineering Center Toshiba Corporation Technology Development Division Fujitsu Limited Process&Manufacturing Engineering Center Toshiba Corporation DRAM Process Integration and Module Technology Department Winbond Electronics Corporation DRAM Process Integration and Module Technology Department Winbond Electronics Corporation Fujitsu Laboratories Limited Technology Development Division Fujitsu Limited Technology Development Division Fujitsu Limited Process&Manufacturing Engineering Center Toshiba Corporation Technology Development Division Fujitsu Limited Fujitsu Laboratories Limited Memory LSI R&D Center Toshiba Corporation DRAM Process Integration and Module Technology Department Winbond Electronics Corporation
A novel backend process is developed for thecylindrical Ru/TaO/Ru capacitor for 130nm generationDRAMs to achieve good electrical *** gas（3%H/97%N）anneal（FGA） induceddegradation can be effectively *** thecylindrica... 详细信息
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Backend process for cylindrical Ru/Ta/sub 2/O/sub 5//Ru capacitor for future DRAM
Backend process for cylindrical Ru/Ta/sub 2/O/sub 5//Ru capa...
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International Conference on Solid-State and Integrated Circuit Technology
作者： J. Lin T. Suzuki H. Minakata A. Shimada K. Tsunoda M. Fukuda T. Kurahashi Y. Fukuzumi A. Hatada A. Sato P.H. Sun Y. Ishibashi H. Tomita N. Nishikawa E. Ito W.C. Liu C.M. Chu R. Suzuki M. Nakabayashi D. Matsunaga K. Hieda K. Hashimoto S. Nakamura Y. Kohyama C.M. Shiah Technology Development Division Fujitsu Laboratories Limited Yokohama Japan Fujitsu Laboratories Limited Yokohama Japan Memory LSI R&D Center Toshiba Corporation Yokohama Japan DRAM Process Integration and Module Technology Department Winbond Electronics Corporation Yokohama Japan Process&Manufactg Engineering Center Toshiba Corporation Yokohama Japan
A novel backend process is developed for the cylindrical Ru/Ta/sub 2/O/sub 5//Ru capacitor for 130 nm generation DRAMs to achieve good electrical characteristics. Forming gas (3%H/sub 2//97%N/sub 2/) anneal (FGA) indu... 详细信息
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Potential propagation model-based failure analysis support tool for MOS LSIs
Potential propagation model-based failure analysis support t...
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IEEE International Symposium on Semiconductor Manufacturing
作者： M. Kodama H. Kakinuma J. Kumagai H. Niina J. Kiji Process & Manufacturing Engineering Center Semiconductor Company Yokohama Japan Memory Division Semiconductor Company Yokohama Japan Research & Development Center Toshiba Corporation Yokohama Japan
This paper presents an efficient failure analysis method using a MOS LSI failure analysis system, named Failure Analysis Support Tool (FAST). When LSI design data, test patterns and test conditions are input into FAST... 详细信息
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Combination of TCAD and physical MOSFET model for LSI development time reduction
Combination of TCAD and physical MOSFET model for LSI develo...
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IEEE/SEMI Conference and Workshop on advanced Semiconductor Manufacturing
作者： K. Ishimaru K. Kasai Y. Fukaura Y. Okayama T. Imamura S. Irie T. Hirano K. Watanabe M. Ueno K. Hashimoto F. Matsuoka Memory LSI Research and Development Center Yokohama Japan Memory Division Yokohama Japan Toshiba Microelectronics Corporation Yokohama Japan System LSI Division Yokohama Japan Toshiba CAE Systems Inc. Yokohama Japan Process Engineering Center Semiconductor Company Toshiba Corporation Yokohama Japan
Advantage of MOSFET SPICE parameter prediction by combining TCAD and BSIM3 model is presented. This method can release sufficient SPICE parameters without wafer fabrication. Lithography TCAD can reduce pattern optimiz... 详细信息
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Liner-supported cylinder (LSC) technology to realize Ru/Ta/sub 2/O/sub 5//Ru capacitor for future DRAMs
Liner-supported cylinder (LSC) technology to realize Ru/Ta/s...
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International Electron Devices Meeting (IEDM)
作者： Y. Fukuzumi T. Suzuki A. Sato Y. Ishibashi A. Hatada K. Nakamura K. Tsunoda M. Fukuda J. Lin M. Nakabayashi H. Minakata A. Shimada T. Kurahashi H. Tomita D. Matsunaga K. Hieda K. Hashimoto S. Nakamura Y. Kohyama Memory LSI Research & Development Genter Toshiba Corporation Yokohama Japan Technology Development Division Fujitsu Laboratories Limited Yokohama Japan Fujitsu Laboratories Limited Yokohama Japan Process & Manufacturing Engineering Center Toshiba Corporation Yokohama Japan
The concept of liner-supported cylinder (LSC) technology to realize robust formation of cylindrical electrodes with Ru, which has advantages to bring out the best of Ta/sub 2/O/sub 5/ performance, is described. With e... 详细信息
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Device characteristics of 0.35 μm P-channel DINOR flash memory using band-to-band tunneling-induced hot electron (BBHE) programming
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IEEE TRANSACTIONS ON ELECTRON DEVICES 1999年 第9期46卷 1866-1871页
作者： Ohnakado, T Onoda, H Sakamoto, O Hayashi, K Nishioka, N Takada, H Sugahara, K Ajika, N Satoh, S Advanced Technology Research and Development Center Mitsubishi Electric Corporation Limited Hyogo Japan Memory IC Division Mitsubishi Electric Corporation Limited Hyogo Japan
The P-channel DINOR flash memory, which uses the band-to-band tunneling induced hot electron (BBHE) program method having the advantages of high scalability, high efficiency, and high oxide reliability, was fabricated... 详细信息
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