咨询与建议

限定检索结果

文献类型

  • 81 篇 会议
  • 7 篇 期刊文献

馆藏范围

  • 88 篇 电子文献
  • 0 种 纸本馆藏

日期分布

学科分类号

  • 36 篇 工学
    • 25 篇 电子科学与技术(可...
    • 13 篇 电气工程
    • 13 篇 化学工程与技术
    • 11 篇 材料科学与工程(可...
    • 7 篇 冶金工程
    • 7 篇 计算机科学与技术...
    • 5 篇 动力工程及工程热...
    • 3 篇 机械工程
    • 3 篇 软件工程
    • 2 篇 力学(可授工学、理...
    • 2 篇 信息与通信工程
    • 2 篇 土木工程
    • 1 篇 光学工程
    • 1 篇 仪器科学与技术
    • 1 篇 控制科学与工程
    • 1 篇 建筑学
    • 1 篇 轻工技术与工程
    • 1 篇 交通运输工程
    • 1 篇 船舶与海洋工程
    • 1 篇 环境科学与工程(可...
  • 22 篇 理学
    • 13 篇 化学
    • 11 篇 物理学
    • 9 篇 数学
    • 1 篇 海洋科学
    • 1 篇 生物学
  • 1 篇 管理学
    • 1 篇 管理科学与工程(可...

主题

  • 16 篇 etching
  • 9 篇 semiconductor de...
  • 8 篇 dielectric mater...
  • 8 篇 stress
  • 7 篇 dielectric break...
  • 7 篇 dielectrics
  • 7 篇 planarization
  • 6 篇 slurries
  • 5 篇 research and dev...
  • 5 篇 chemicals
  • 5 篇 integrated circu...
  • 5 篇 samarium
  • 5 篇 copper
  • 5 篇 capacitance
  • 5 篇 flash memory
  • 5 篇 ash
  • 5 篇 manufacturing in...
  • 4 篇 dielectric measu...
  • 4 篇 plasma applicati...
  • 4 篇 plasmas

机构

  • 11 篇 advanced module ...
  • 9 篇 advanced module ...
  • 7 篇 technology devel...
  • 6 篇 advanced module ...
  • 5 篇 shanghai huali i...
  • 3 篇 advanced packagi...
  • 3 篇 institute of ele...
  • 2 篇 advanced technol...
  • 2 篇 advanced module ...
  • 2 篇 process integrat...
  • 2 篇 advanced technol...
  • 2 篇 advanced module ...
  • 2 篇 global reliabili...
  • 2 篇 institute of ele...
  • 2 篇 department of me...
  • 2 篇 advanced module ...
  • 1 篇 advanced module ...
  • 1 篇 national univers...
  • 1 篇 ibm semiconducto...
  • 1 篇 department of el...

作者

  • 17 篇 m.s. liang
  • 13 篇 kuang-chao chen
  • 13 篇 tahone yang
  • 9 篇 k.c. lin
  • 9 篇 fang jingxun
  • 9 篇 chih-yuan lu
  • 9 篇 zhang jian
  • 8 篇 c.h. yu
  • 8 篇 zhang yu
  • 8 篇 hong-ji lee
  • 7 篇 zhou haifeng
  • 7 篇 nan-tzu lian
  • 7 篇 s.m. jang
  • 6 篇 y.c. lu
  • 6 篇 s.m. jeng
  • 5 篇 zhang lei
  • 5 篇 jingxun fang
  • 5 篇 sheng-yuan chang
  • 5 篇 tuung luoh
  • 4 篇 l.p. li

语言

  • 83 篇 英文
  • 4 篇 其他
  • 1 篇 中文
检索条件"机构=Advanced Module Technology Development"
88 条 记 录,以下是41-50 订阅
Reduction of shorts between word lines on charge-trapping flash cell in a self-aligned double patterning technology
Reduction of shorts between word lines on charge-trapping fl...
收藏 引用
IEEE/SEMI Conference and Workshop on advanced Semiconductor Manufacturing
作者: Hong-Ji Lee Kuo-Liang Wei Nan-Tzu Lian Tahone Yang Kuang-Chao Chen Chih-Yuan Lu Technology Development Center Advanced Module Process Development Division Macronix International Company Limited Hsinchu Taiwan
This paper presents a unique gate structure for reducing shorts between word lines on charge-trapping flash cell memory. In the early stage of developing sub-45 nm half-pitch word line by a self-aligned double pattern... 详细信息
来源: 评论
Robust shallow trench isolation technique used for 75nm nor flash memory
Robust shallow trench isolation technique used for 75nm nor ...
收藏 引用
IEEE/SEMI Conference and Workshop on advanced Semiconductor Manufacturing
作者: Jeng-Hwa Liao Kuo-Liang Wei Hong-Ji Lee Chun-Min Cheng Chun-Ling Chiang Jung-Yu Hsieh Ling-Wu Yang Tahone Yang Kuang-Chao Chen Chih-Yuan Lu Technology Development Center Advanced Module Process Development Division Macronix International Company Limited Hsinchu Taiwan
We have developed a new Self-aligned poly (SAP) process to improve the tunnel oxide integrity by optimizing the shallow trench isolation (STI) corner rounding profile and reducing the local oxide thinning effect. It i... 详细信息
来源: 评论
Line end shortening and corner rounding for novel off-axis illumination source shapes
Line end shortening and corner rounding for novel off-axis i...
收藏 引用
Optical Microlithography XXII
作者: Ling, Moh Lung Chua, Gek Soon Lin, Qunying Tay, Cho Jui Quan, Chenggen National University of Singapore Department of Mechanical Engineering 10 Kent Ridge Crescent Singapore 119260 Singapore Advanced Litho Enablement Mask Technology Singapore Advanced Module Technology Development Lithography Chartered Semiconductor Manufacturing Limited 60 Woodlands Industrial Park D Singapore 738406 Singapore
Previous study has shown that off-axis illumination (OAI) which employs duplicate conventional source shape such as double dipóle, double annular or double quadrupole can reduce the effect of line width fluctuati... 详细信息
来源: 评论
Etch defect characterization and reduction in hard-mask-based Al interconnect etching
International Journal of Plasma Science and Engineering
收藏 引用
International Journal of Plasma Science and Engineering 2008年 第1期2008卷
作者: Lee, Hong-Ji Hung, Che-Lun Leng, Chia-Hao Lian, Nan-Tzu Young, Ling-Wu Yang, Tahone Chen, Kuang-Chao Lu, Chih-Yuan Advanced Module Process Development Division Technology Development Center Macronix International Company Ltd. Li-Hsin Road Hsinchu 300 Taiwan
This paper identifies the defect adders, for example, post hard-mask etch residue, post metal etch residue, and blocked etch metal island and investigates the removal characteristics of these defects within the oxide-... 详细信息
来源: 评论
Production Worthy 3D Interconnect technology
Production Worthy 3D Interconnect Technology
收藏 引用
International Microsystems, Packaging, Assembly and Circuits technology (IMPACT)
作者: W.C. Chiou C.H. Yu Advanced Module Technology Division Research and Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
In accordance with continuing push for smaller and faster electronics, there is strong demand for further miniaturization and higher performance of mobile and other digital devices. Three-dimensional interconnect with... 详细信息
来源: 评论
Novel CMP Barrier Slurry for Integrated Porous Low-k technology of 45nm Node
Novel CMP Barrier Slurry for Integrated Porous Low-k Technol...
收藏 引用
IEEE International Conference on Interconnect technology
作者: H.H. Kuo J.Y. Song K.C. Lin C.C. Chou Y.H. Chen S.M. Jeng C.H. Yu M.S. Liang Advanced Module Technology Division Research and Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
The process integration of novel Cu CMP's barrier slurry for the 45nm-node non-capped ultra low-k (ULK, k < 2.5) technology is reported. The slurry, based on a 'self-stop' concept, was designed to mitig... 详细信息
来源: 评论
Integration of Cu Damascene with Pore-sealed PECVD Porogen Low-k (k=2.5) Dielectrics for 65nm Generation
Integration of Cu Damascene with Pore-sealed PECVD Porogen L...
收藏 引用
International Symposium on VLSI technology, Systems and Applications
作者: M.l. Yeh C.c. Chou T.i. Bao K.c. Lin I.i. Chen K.p. Huang Z.c. Wu S.m. Jeng C.h. Yu M.s. Liang Advanced Module Technology Division Research & Development Taiwan Semiconductor Manufacturing Company Hsin-Chu Taiwan R.O.C Advanced Module Technology Division Research & Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
Owing to the k extendability of porogen LK formed with the incorporation and removal of organic porogen precursors, the porogen LK is the competitive candidate for inter-metal dielectrics (IMDs) of 65nm generation and... 详细信息
来源: 评论
Evaluation and Numerical Simulation of Optimal Structural Designs for Reliable Packaging of Ultra Low K Process technology
Evaluation and Numerical Simulation of Optimal Structural De...
收藏 引用
IEEE International Conference on Interconnect technology
作者: T.C. Huang C.T. Peng C.H. Yao C.H. Huang S.Y. Li M.S. Liang Y.C. Wang W.K Wan K.C. Lin C.C. Hsia M. Liang Advanced Module Technology Division Research and Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
The die edge-seals and circuit under fad (CUF) are structurally optimized through 3D finite element analysis (FEA). Die edge-seals having the mechanically reinforced structure units are demonstrated essential. It is a... 详细信息
来源: 评论
Dielectric/TaN Interface Design with Self-Assembled Monolayer Liner for 45nm & Beyond Cu/Porous Low-k Damascene Interconnects
Dielectric/TaN Interface Design with Self-Assembled Monolaye...
收藏 引用
IEEE International Conference on Interconnect technology
作者: C.C. Ko K.C. Lin C.C. Choug T.I. Bao T.C. Tseng S.M. Jeng C.H. Yu M.S. Liang Advanced Module Technology Division Research and Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
The concerns of barrier integrity in applications of porous low-k (PLK) dielectrics for Cu dual damascene (DD) interconnects have been dismissed with a novel self-assembled monolayer (SAM) approach. Results showed a 7... 详细信息
来源: 评论
The 3rd dimension-More Life for Moore's Law
The 3rd dimension-More Life for Moore's Law
收藏 引用
International Microsystems, Packaging, Assembly and Circuits technology (IMPACT)
作者: C.h. Yu Advanced Module Technology Division Research and Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan
In accordance with continuing push for smaller and faster electronics, there is strong demand for further miniaturization and higher performance of mobile and other digital devices. Three-dimensional interconnect with... 详细信息
来源: 评论