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Supercritical CO/sub 2/ clean with novel solution for 65 nm and beyond BEOL performance improvement

Supercritical CO/sub 2/ clean with novel solution for 65 nm ...

引用

IEEE International Conference on Interconnect technology

作者： W.H. Tseng C.M. Yang W.J. Wu C.Y. Wang J.C. Hu C.H. Hsiung Y.L. Lin T.I. Bao J.L. Yang J.H. Shieh C.C. Jeng J.C. Lin I.L. Huang H.C. Chen H. Lo J. Wang C.H. Yu M.S. Liang Advanced Module Technology Division Research & Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan

Supercritical CO/sub 2/ (SCCO/sub 2/) clean/modification performance on a 300 mm tool with promising physical, electrical and reliability results for 65 nm low k dual damascene is successfully demonstrated in this work. The process is optimized to remove post-ash residues and modify the dielectric film damaged by O/sub 2/ plasma ash. The low-k value dielectric (LKD) surface is modified from hydrophilic to hydrophobic by the SCCO/sub 2/ treatment. Dielectric constant measurements before and after treatment show effective modification only on porous CVD LKD films. Leakage performance with 55% reduction and capacitance performance with 11% reduction by the process with respect to the conventional process demonstrate the benefits. The process is compatible with the 8 layer scheme. Promising electro-migration (EM), stress migration (SM) performance and better time-dependent dielectric breakdown (TDDB) results indicate that the process is more robust than the conventional one for future interconnects. For 65 nm generation and beyond, SCCO/sub 2/, clean/modification is demonstrated as a promising solution for Cu/low k integration.

关键词： Plasma measurements Dielectric films Ash Surface treatment Dielectric constant Dielectric measurements Capacitance Stress Samarium Dielectric breakdown

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Using a low-k material with k=2.5 formed by a novel quasi-porogen approach for 65 nm Cu/LK interconnects

Using a low-k material with k=2.5 formed by a novel quasi-po...

引用

IEEE International Conference on Interconnect technology

作者： C.C. Ko C.H. Lin L.P. Li K.C. Lin Y.C. Lu S.M. Jeng C.H. Yu M.S. Liang Advanced Module Technology Division Research & Development Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan

A porous k=2.5 low-k material (LK2.5) with its pore size distribution and mechanical properties comparable to the ones of k=3.0 low-k materials (LK3.0) was developed by a novel quasi-porogen approach for 65 nm BEOL Cu dual damascene (DD) interconnects. As compared to the Cu/LK3.0 DD, the Cu/LK2.5 DD, processed using similar etching and ashing processes and chemistries, showed a 14% line-to-line (L-L) capacitance reduction at S=0.1 /spl mu/m. Other physical, electrical and reliability results show that the Cu/LK2.5 DD is comparable to the Cu/LK3.0 DD with no degradations commonly associated with conventional porous LK2.5s formed using porogens, such as peeling or LK recess in CMP, k increase or trench bottom roughening in patterning, high L-L leakage, low L-L Vbd or low SM resistance. Further process extendibility studies revealed that k<2.0 is also achievable using this quasi-porogen approach which strongly enables its applicability to current and future Cu/LK BEOL technologies.

关键词： Curing Semiconductor materials Mechanical factors Chemistry Etching Density measurement Mechanical variables measurement Size measurement Semiconductor device manufacture Manufacturing industries

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Porous Ultra low-k process technology development for 65/45 nm nodes

Porous Ultra low-k process technology development for 65/45 ...

引用

22nd International VLSI Multilevel Interconnection Conference, VMIC 2005

作者： Yao, C.H. Jeng, C.C. Wan, W.K. Lin, K.C. Liang, Ming-Shuo Lin, H.H. Huang, C.H. Chi, K.S. Huang, T.C. Huang, C.S. Wang, Y.C. Lei, M.D. Chen, K.S. Wang, S.C. Chang, C.Y. Hsia, Chin C. Liang, Mong-Song Advanced Module Technology Division R and D Taiwan Semiconductor Manufacturing Co. Ltd. No. 6 Li-Hsin Rd. 6 Hsin-Chu Taiwan Micro Patterning Technology Division R and D Taiwan Semiconductor Manufacturing Co. Ltd. No. 6 Li-Hsin Rd. 6 Hsin-Chu Taiwan

This article illustrates 300mm BEOL process integration results adopting (κ=2.5) porous Ultra LK (ULK) materials. RC performance of interconnects integrated with Via First (VF) and Trench First Hard Mask (TFHM) schemes are compared and analyzed. There is about 18% C reduction from our 65nm technology with k=2.9 LK material. [1] The integration scheme selection, process window characterization and packaging evaluation are also the major discussion subjects. In addition, the first immersion exposure tool results combined with the optimized scheme for the 45nm technology node are also demonstrated.

关键词： Integrated circuit interconnects

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Supercritical CO2 clean with novel solution for 65 nm and beyond BEOL performance improvement

Supercritical CO2 clean with novel solution for 65 nm and be...

引用

IEEE 2005 International Interconnect technology Conference, IITC

作者： Tseng, W.H. Yang, C.M. Wu, W.J. Wang, C.Y. Hu, J.C. Hsiung, C.H. Lin, Y.L. Bao, T.I. Yang, J.L. Shieh, J.H. Jeng, C.C. Lin, J.C. Huang, J.L. Chen, H.C. Lo, Henry Wang, J. Yu, C.H. Liang, M.S. Advanced Module Technology Division R and D Taiwan Semiconductor Manufacturing Company Ltd. 8 Li-Hsin Rd. 6 Hsinchu Sci. Park Hsinchu 300-77 Taiwan Technology Reliability Physics Department Taiwan Semiconductor Manufacturing Company Ltd. 8 Li-Hsin Rd. 6 Hsinchu Sci. Park Hsinchu 300-77 Taiwan

ISBN: (纸本)078038752X

Supercritical CO2 (SCCO2) clean/modification performance on 300 mm tool with promising physical, electrical and reliability results for 65nm low k dual damascene is successfully demonstrated in this work. SCCO2 clean/modification process is optimized to remove post-ash residues and modify the low k dielectric film damaged by O2 plasma ash. The low-k value dielectric (LKD) surface is modified from hydrophilic to hydrophobic by SCCO2 treatment. Dielectric constant measurements before and after SCCO2 treatment show effective modification only on porous CVD LKD films. Leakage performance with 55% reduction and capacitance performance with 11% reduction by SCCO2 process with respect to the conventional process demonstrate the benefits of SCCO2 clean/modification. SCCO2 process is compatible with 8 layers Cu/low k scheme. Promising electro-migration (EM), stress migration (SM) performance and better time-dependent dielectric breakdown (TDDB) results indicate that SCCO2 process is more robust than the conventional one for future interconnect. For 65nm generation and beyond, SCCO2 clean/modification is demonstrated as a promising solution for Cu/low k integration. © 2005 IELE.

关键词： Carbon dioxide

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Characterization of strip induced damage in ultra low-k dielectric

Characterization of strip induced damage in ultra low-k diel...

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IEEE International Symposium on Semiconductor Manufacturing

作者： J.S. Tsai Y.N. Su R.Y. Huang J.M. Chiou J.H. Shieh H.Y. Chu J.J. Lee C.Y. Ting S.M. Jang M.S. Liang Advanced Module Technology Division R&D Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan Yield Enhancement Service Department Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan Process Failure Analysis Department Taiwan Semiconductor Manufacturing Company Limited Hsinchu Taiwan

STEM-EDS analysis on the sidewall surface of ultra low-k dielectric (ULK), a CVD SiOC type low-k dielectric (k /spl ap/ 2.5), has been performed to study the damage behavior of low-k material during strip. Carbon depletion was observed on the sidewall surface by plasma strip using N/sub 2//H/sub 2/, H/sub 2/, and O/sub 2/ chemistries in different ashers. The strip using N/sub 2//H/sub 2/ has minimum damage of low-k material because it forms a nitridation layer protecting ULK from subsequent damage whereas RIE mitigates the damage because of the nature of less chemical reaction.

关键词： Strips Hydrogen Dielectric constant Dielectric measurements Plasma measurements Dielectric materials Plasma applications Plasma chemistry Manufacturing processes Semiconductor device manufacture

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Investigation of plasma-induced damage of nickel mono-silicide in semiconductor manufacturing

Investigation of plasma-induced damage of nickel mono-silici...

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11th International Symposium on the Physical and Failure Analysis of Integrated Circuits

作者： Hsu, PF Tsai, MH Perng, BC Shieh, JH Tao, HJ Liang, MS Advanced Module Technology Division Research and Development Taiwan Semiconduct. Mfg. Co. Ltd. Taiwan

ISBN: (纸本)0780384547

In this paper, we studied the plasma-induced damage of a nickel mono-siticide (NiSi) using XPS, TEM, AES and SIMS. According to the previous experience, it suggests that NiSi is easily oxidized when O-2 exists in plasma, which results in a high sheet resistance of oxide/silicide (NiSiOx mixture. A substrate-dependent oxidation of NiSi formed on the different dose-implanted silicon or poly-silicon substrate was also investigated in this study.

关键词： Nickel compounds

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Direct determination of interface and bulk traps in stacked HfO₂ dielectrics using charge pumping method 42

Direct determination of interface and bulk traps in stacked ...

引用

42nd Annual IEEE International Reliability Physics Symposium

作者： Hou, TH Wang, MF Mai, KL Lin, YM Yang, MH Yao, LG Jin, Y Chen, SC Liang, MS Advanced Module Technology Division Research and Development Taiwan Semiconduct. Mfg. Co. Ltd. Taiwan

ISBN: (纸本)078038315X

For the first time, trap density at SiO2/Si interface, HfO2/SiO2 interface, and HfO2 bulk of stacked HfO2/SiO2 dielectrics are quantified respectively with a simple charge pumping method. It was found that the amount of each individual type of traps can be well correlated to specific process conditions as well as device performance, which makes such innovative characterization method very powerful for process optimization of high-k dielectrics.

关键词： Dielectric materials

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Extended scaling of ultrathin gate oxynitride toward sub-65nm CMOS by optimization of UV photo-oxidation, soft plasma/thermal nitridation & stress enhancement

Extended scaling of ultrathin gate oxynitride toward sub-65n...

引用

2004 Symposium on VLSI technology - Digest of Technical Papers

作者： Chen, Chi-Chun Chang, V.S. Jin, Y. Chen, C.-H. Lee, T.-L. Chen, S.-C. Liang, M.-S. Advanced Module Technology Division Research and Development Taiwan Semiconduct. Mfg. Co. Ltd.

A novel UV photo-oxidation (UVPO) is developed for ideal "atomic-layer oxidation" with excellent thickness control down to 4Å, which is very promising for interfacial layer formation of scaled gate oxynitride and high-k applications. In addition, ultrathin oxynitride (EOT<12Å) using a newly-developed low ion-energy nitrogen plasma (30% plasma damage reduction) in combination with thermal nitridation is demonstrated for n/pMOSFET performance optimization. Finally, device performance is further enhanced (+7% of nFET Ion-Ioff by tensile stress with negligible impact on pFET) by mechanical stress modulation from strain contact-etch-stop layer (CESL). The proposed technologies represent an efficient approach to realize ultrathin gate oxynitride toward sub-65nm CMOS production.

关键词： Ultraviolet radiation

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Challenges in Cu/low-K integration

Challenges in Cu/low-K integration

引用

IEEE International Electron Devices Meeting, 2004 IEDM

作者： Liang, Mong-Song Advanced Module Technology Division R and D Taiwan Semiconductor Manufacturing Company Science-Based Industrial Park Hsin-Chu 300-77 Taiwan

advanced BEOL materials matching in chemical, thermal, and mechanical properties remain a challenge to the industry. New failure modes associated with BEOL reliability hinder the mass production of Cu/Low-K technology. With 15% IMD effective-K reduction target, low-K, ESL, and metal pitch/height ratio optimization are crucial. Integrated module built-in reliability robustness is to assure stable production. Physical, electrical, reliability, and manufacturability aspects of individual module require full characterization. Implementations of proper queue-time control and iAPC between modules will minimize excursions and increase process window. © 2004 IEEE.

关键词： Dielectric materials

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Low k damage control & its reliability for organic hybrid dual damascene

Low k damage control & its reliability for organic hybrid du...

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Proceedings of the 11th International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA 2004

作者： Su, Y.N. Shieh, J.H. Hsu, P.P. Lin, K.C. Chiou, W.C. Kuo, H.H. Tao, H.J. Liang, M.S. Advanced Module Technology Division Research and Development Taiwan Semiconduct. Mfg. Co. Ltd. Science-Based Industrial Park Hsin-Chu 300-77 Taiwan

A hybrid dual damascene interconnect approach with organic ultra-low-k for gap filling has been demonstrated. Traditional PR approach with via-first process for dual damascene suffers from ashing damage for CVD ultra-low-k. Our approach is able to circumvent the issues mentioned above without introducing the process complication. Good Rs control is obtained for trench etch without a middle stop layer. And good Re yield with good thermal stability is obtained as well. 21% of RC product reduction is obtained when it is compared with PR approach for CVD ultra-low-k. ©2004 IEEE.

关键词： Integrated circuits

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