In this paper, the physical and electrical characteristics of ultra-thin plasma nitrided gate dielectrics are reported, aiming for sub-50 nm gate length CMOS applications. The impact of plasma nitridation conditions o...
详细信息
In this paper, the physical and electrical characteristics of ultra-thin plasma nitrided gate dielectrics are reported, aiming for sub-50 nm gate length CMOS applications. The impact of plasma nitridation conditions on DC characteristics was investigated extensively by changing nitrogen plasma pressure, plasma immersion time, or plasma generation power. NBTI has been also investigated and the lifetime at 105/spl deg/C and 0.85 V operation is estimated to be about 10 years. The final current drives of 690 /spl mu/A//spl mu/m for nFET and 301 /spl mu/A//spl mu/m for pFET at Vdd = 0.85 V (Ioff = 100 nA//spl mu/m) have been achieved in sub-50 nm CMOS with optimized plasma nitrided gate dielectric with EOT <1.2 nm.
A new principle for the copper removal process, Electro-Chemical-Polishing (ECP), to replace CMP is demonstrated. ECP which leverages electrochemical dissolution of copper has removal rates determined by the imposed c...
详细信息
A new principle for the copper removal process, Electro-Chemical-Polishing (ECP), to replace CMP is demonstrated. ECP which leverages electrochemical dissolution of copper has removal rates determined by the imposed current, higher than 8000 A/min, while "planarization" is made by wiping out copper complexes at a wiping pressure ten times lower than that for CMP to form erosion- and scratch-free damascene copper interconnects. ECP is a promising replacement for CMP suitable for copper inlaid in fragile low-k materials.
暂无评论