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Annual IEEE Northeast Workshop on Circuits and Systems (NEWCAS)

作者： Ahmed N. Mohieldin Hassan O. Elwan Ahmed A. Emira Electrical Engineering Department Cairo University Giza Egypt Analog & Mixed-Signal Design Center Newport Media Inc.orporation Lake Forest CA USA

A low-voltage 5 th -order continuous-time ΣΔ modulator for a universal mobile TV receiver is presented. A unique feature of the proposed modulator is the blocker filtering provided using a 3 rd order notch filter employing frequency dependent negative resistance (FDNR). The noise added by the FDNR is shaped. The modulator employs 3-level switched-capacitor DAC in the feedback. It has been implemented in 65nm CMOS process and occupies an area of 0.26mm 2 . It consumes 6mA from a single 1.2V supply at a sampling frequency of 146MS/s while providing 70dB of dynamic range in 3.85MHz bandwidth.

关键词： Modulation Dynamic range Receivers Noise Capacitors Bandwidth Switches

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SIDO buck converter with independent outputs

SIDO buck converter with independent outputs

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Midwest Symposium on Circuits and Systems (MWSCAS)

作者： H. Eachempatti S. Ganta J. Silva-Martinez H. Martínez-Garcia QUALCOMM Inc.orporated San Diego CA USA Analog and Mixed Signal Center Electrical and Computer Engineering Department ECE Texas A and M University College Station TX USA College of Industrial Engineering of Barcelona EUETIB Department of Electronics Eng. Technical University of Catalonia Barcelona Spain

The portable electronics market is rapidly migrating towards more compact devices requiring multiple high-integrity high-efficiency voltage supplies for empowering the systems. This paper demonstrates a single inductor used in a buck converter with two output voltages from an input battery with voltage of value 3V. The main target is low cross regulation between the two outputs to supply independent load current levels while maintaining desired output voltage values well within a ripple that is set by adaptive hysteresis levels. A reverse current detector to avoid negative current flowing through the inductor prevents efficiency degradation at light load.

关键词： Buck converters Voltage Inductors Switched-mode power supply Capacitors Consumer electronics Hysteresis Rails Monitoring Switches

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Parametric Fault Diagnosis of Nonlinear analog Circuits using Polynomial Coefficients

Parametric Fault Diagnosis of Nonlinear Analog Circuits usin...

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International Conference on VLSI design

作者： Suraj Sindia Virendra Singh Vishwani D. Agrawal Mixed Signal Systems Group India Product Development Centre Analog Devices Inc. Supercomputer Education and Research Centre Indian Institute of Science Department of Electrical and Computer Engineering Auburn University

ISBN: (纸本)9781424455416

We propose a method for diagnosis of parametric faults in analog circuits using polynomial coefficients of the circuit model [15]. As a sequel to our recent work [14], where circuit response is modeled as polynomial for uncovering parametric faults in nonlinear circuits, we propose diagnosis of such faults using sensitivity of coefficients of the estimated polynomial to circuit parameters. The proposed method requires no design for test hardware as might be added to the circuit by some other methods. The proposed method is illustrated for a benchmark elliptic filter. It is shown to uncover several parametric faults causing deviations as small as 5% from the nominal values.

关键词： analog circuits faults circuit parameter Fault diagnosis circuit response Nonlinear circuits Nonlinear analog circuits approximation Parametric Polynomial Parametric fault

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A Discrete-Time Downsampling FIR Filter for Windowed Integration Samplers

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International Journal of Microwave Science and Technology 2010年第1期2009卷

作者： Karthik Raviprakash Mandar Kulkarni Xi Chen Sebastian Hoyos Brian M. Sadler Analog and Mixed Signal Center (AMSC) Department of Electrical and Computer Engineering Texas A&M University College Station TX 77843 USAtamu.edu Army Research Laboratory AMSRD-ARL-CI-NT Adelphi MD 20783 USAarmy.mil

A novel technique to reduce die area on a discrete-time sinc 2 ↓2 filter for charge sampling is proposed. An SNR comparison of the conventional and the proposed topology reveals that the new technique saves 25% die area occupied by the sampling capacitors of the filter. The idea is also extended to implement higher downsampling factors, and greater percentage of area is saved as the downsampling factor is increased. The proposed filter also has the topological advantage over previously reported works of allowing the designers to use active integration to charge the capacitance, which is critical in obtaining high linearity.

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A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 complementary-injection-locked 4 GHz frequency divider

A 1.8V, sub-mW, over 100% locking range, divide-by-3 and 7 c...

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Custom Integrated Circuits Conference (CICC)

作者： Yung-Chung Lo Hsien-Pu Chen Jose Silva-Martinez Sebastian Hoyos Analog Mixed-Signal Center Department of Electrical and Computer Engineering Texas A and M University College Station TX USA

A low-power wideband divide-by-odd-ratio ring-oscillator-based complementary-injection-locked frequency divider (CILFD) is proposed. The multiple-input complementary-injection scheme widens its locking range over 100% to sufficiently cover the PVT variations. The CILFD consumes dynamic power only with no additional power penalty for larger division ratios. The differential input and output are realized employing auxiliary cross-connected inverters. The CILFDs with division ratios of 3 and 7 are implemented in a 0.18 mum CMOS technology. The measurement results show a locking range from 1.4 to 4.4 GHz with an input incident power of -4 dBm. The power consumption while locked at 4.7 GHz is 0.9 mW from a single 1.8-V power supply.

关键词： Frequency conversion CMOS technology Wideband Inverters Power measurement Energy consumption Power supplies

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New applications and technology scaling driving next generation A/D converters

New applications and technology scaling driving next generat...

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European Conference on Circuit Theory and design, ECCTD

作者： Heng Zhang Mohamed Mostafa Elsayed Edgar Sanchez-Sinencio Analog & Mixed Signal Center Electrical and Computer Engineering Department Texas A and M University College Station TX USA

Recent trends for A/D converters are here presented. New applications and technology scaling are the main driving forces on next generation ADCs. Adaptive ADCs and ultra-low power ADCs are motivated by new demanding specifications. Technology scaling stimulates the time-domain versus voltage-domain ADCs. Furthermore, various techniques to eliminate the power hungry opamps are in progress.

关键词： Pipelines Delta-sigma modulation signal resolution Switches Application software Software radio analog computers Energy resolution Energy consumption Circuits

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design optimization for 10gb/s full-duplex transmission using RSOA-based ONU with electrical and optical filtering and equalization

Design optimization for 10gb/s full-duplex transmission usin...

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European Conference on Optical Communication (ECOC)

作者： M. Omella I. Papagiannakis D. Klonidis J.A. Lazaro A.N. Birbas J. Kikidis I. Tomkos J. Prat Signal Theory & Communications Department (TSC) UPC Barcelona Tech Spain Electrical & Computer Engineering Department University of Patras Patras Greece Athens Information Technology Center Athens Greece Analog Integrated Electronic Systems S. A. Greece

The optimum design characteristics to maximize the performance of 10 Gbps full-duplex bidirectional transmission are studied experimentally using a low-bandwidth RSOA assisted by electronic equalization and optimum fi... 详细信息

关键词： Optical filters design optimization Optical network units Filtering Optical receivers Optical attenuators Passive optical networks Optical noise Band pass filters Bandwidth

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Nonlinear shaping SC oscillator with enhanced linearity

Nonlinear shaping SC oscillator with enhanced linearity

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作者： Park, Sang Wook Ausín, José L. Bahmani, Faramarz Sánchez-Sinencio, Edgar Analog and Mixed-Signal Center Electrical and Computer Engineering Department Texas A and M University College Station TX 77843 United States Department of Electrical and Electronic Engineering University of Extremadura 06071 Badajoz Spain Scintera Networks Inc. Sunnyvale CA 94086 United States

A nonlinear shaping technique for a switched-capacitor (SC) bandpass filter (BPF) based oscillator yielding enhanced linearity is presented. Usually, for an SC oscillator consisting of a BPF and a two-level comparator, the linearity can only be improved by increasing the quality factor (Q-factor) of the BPF. This paper proposes an efficient way to improve the linearity of SC BPF-based oscillators. In particular, by replacing the conventional two-level comparator by a sound multilevel comparator, a nonlinear shaping of the signal at the output of the comparator causes a significant improvement in linearity. To illustrate the effectiveness of the proposed technique, one conventional SC BPF-based oscillator and the proposed oscillator have been designed and fabricated in a standard 0.35-μm CMOS technology. Each oscillator was designed to operate from a ±1.65 V supply voltage and a master clock frequency of 80 MHz. The oscillation frequency is 10 MHz and the Q-factor of the BPF is 10. Experimental results demonstrate that the proposed scheme improves the third-order harmonic distortion by 20 dB with respect to the conventional SC BPF-based oscillator. © 2007 IEEE.

关键词： Bandpass filters

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System desion for integrated DVB-H DTV tuner

System desion for integrated DVB-H DTV tuner

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4th IASTED International Conference on Circuits, signals, and Systems, CSS 2006

作者： Xiao, Jianhong Kulkarni, Raghavendra Moon, Yong Silva-Martinez, Jose Analog and Mixed Signal Center Department of Electrical and Computer Engineering Texas A and M University College Station TX 77840 United States

ISBN: (纸本)9780889866072

A system design analysis for the integrated tuner is presented in this paper. The DVB-H system is briefly described and the general tuner requirements are given based on system simulations. After the review of the conventional tuner architectures, the direct conversion architecture is further analyzed and the major design considerations including DC offset and I/Q mismatch, even-order distortion are discussed. The block level design specifications for this direct conversion tuner are given in the end.

关键词： Tuners

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An 11-band 3.4 to 10.3 GHz MB-OFDM UWB receiver in 0.25μm SiGe BiCMOS

An 11-band 3.4 to 10.3 GHz MB-OFDM UWB receiver in 0.25μm S...

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2006 Symposium on VLSI Circuits, VLSIC

作者： Valdes-Garcia, Alberto Mishra, Chinmaya Bahmani, Faramarz Silva-Martinez, Jose Sánchez-Sinencio, Edgar Analog and Mixed Signal Center Department of Electrical and Computer Engineering Texas A and M University College Station TX 77843-3128 United States

ISBN: (纸本)1424400066

An 11-band 3.4-10.3GHz direct conversion receiver for MB-OFDM UWB is implemented in a 0.25μm BiCMOS process. It includes an RF front-end with interference rejection at 5.25GHz, a frequency synthesizer generating 11 carrier tones in quadrature with fast hopping, and a linear phase baseband section with 42dB of gain programmability. The packaged IC mounted on FR-4 substrate provides maximum gain of 67-78dB and NF of 5-10dB across all bands while consuming 114mA from a 2.5V supply. © 2006 IEEE.

关键词： BiCMOS technology

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