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IEEE Conference on Vehicular Technology (VTC)

作者： I. Sedov S. Preuss C. Cap M. Haase D. Timmermann Department of Computer Science University of Rostock Germany Department of Computer Science Chair for Information and Communication Services University of Rostock Germany Department of Electrical Engineering and Information Technology Institute of Applied Microelectronics and Computer Science Germany

Key challenges in wireless mobile ad hoc networks are computational resource constraints, power limitations, and efficient service discovery techniques. The short range radio network technology Bluetooth suffers from long service discovery delays and high power consumption due to necessary connection establishment between discovering and discovered entity. For improving the efficiency of service discovery in Bluetooth networks we propose two new approaches. By leveraging the implicit broadcast capability of the Bluetooth inquiry procedure, we significantly reduce the service discovery time and hence lower the power consumption. Moreover, we enable the integration of resource limited devices which are incapable of taking part in service discovery themselves. Based on a performance evaluation and a comparison with legacy Bluetooth service discovery protocol (SDP), we present the benefits of our new approaches.

关键词： Energy efficiency Bluetooth Energy consumption Protocols Broadcasting Petroleum computer science Mobile ad hoc networks Personal area networks Temperature sensors

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Dynamic single phase logic with self-timed stages for power reduction in pipeline circuit designs

Dynamic single phase logic with self-timed stages for power ...

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2001 IEEE International Symposium on Circuits and Systems, ISCAS 2001

作者： Grassert, F. Timmermann, D. Institute for Applied Microelectronics and Computer Science Department of Electrical Engineering and Information Technology University of Rostock Rxhard-Wagner-Str. 3 1 D-18119 Rostock Germany

ISBN: (纸本)0780366859

True single phase clock logic techniques, e.g. with alternating arranged Nand P-logic cells, yield easily to design circuits with standard cells and high speed potential. The disadvantages are a difficult clock tree design and high power consumption. To realize every logic function, dual rail or differential styles are chosen which increase clock load. This paper presents a method to speed up dynamic single clock circuits. The advantage of asynchronous logic is that the critical path delay is the sum of only the evaluation times of the single logic blocks without wasting time for waiting, latches, or redundant logic. Therefore, this work assembles small asynchronous chains of dynamic logic blocks into one period of the global clock to minimize the unused time per clock cycle (AC-TSPC). However, the synchronous single phase clocking scheme is maintained. The advantages of this method are shorter latencies for calculations, power reduction by smaller clock trees and no need for latches, and a simpler clock distribution network due to increased clock skew tolerance. The results of the simulations of an 8/spl times/8 bit multiplier in TSPC and in AC-TSPC show an enhancement in power-reduction of 40% for the logic and of 89% for the clock tree with a latency reduction of 40% and more in comparison with TSPC. © 2001 IEEE.

关键词： Forestry

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Electrical Characteristics of Doped and Undoped High Dielectric Constant BCTZ Thin Films

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MRS Online Proceedings Library 2001年第1期666卷 531-536页

作者： Yi, Woo-Chul Kalkur, T. S. Philofsky, Elliott Kammerdiner, Lee Microelectronics Research Laboratories Department of Electrical and Computer Engineering University of Colorado Colorado Springs USA Applied Ceramics Research Company Colorado Springs USA

Ba1−xCax Ti1-y ZryO3 materials have very high dielectric constant (up to 30,000) in the bulk form. In this paper, we are presenting the electrical and structural characteristics of undoped and 0.4% Mg-doped Ba0.96Ca0.04Ti0.84Zr0.16O3 (BCTZ) thin films on Pt/Ti/SiO2/Si substrates. The BCTZ films were deposited by spin on metal-organic decomposition method and annealed at a temperature 600-900°C in oxygen environment. The annealed thin films were characterized by X-ray diffraction. The electrical characteristics of the annealed thin films were analyzed by capacitance–voltage and current–voltage measurements. The as-annealed thin films were post- annealed in nitrogen and oxygen environments and the effect of post-annealing on their electrical characteristics were also presented in conjunction with 0.4% Mg doping effect of BCTZ thin films for possible high dielectric constant material applications.

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Magnetoelastic microsensors for environmental monitoring

Magnetoelastic microsensors for environmental monitoring

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IEEE International Conference on Micro Electro Mechanical Systems

作者： C.A. Grimes M.K. Jain R.S. Singh Q. Cai A. Mason K. Takahata Y. Gianchandani Department of Electrical Engineering Center for Micro-Magnetic and Electronic Devices University of Kentucky Lexington KY USA Department of Electrical and Computer Engineering Wisconsin Center for Applied Microelectronics University of Wisconsin Madison WI USA

ISBN: (纸本)0780359984

This paper reports on the operational characteristics, and application, of a new passive wireless micro-sensor platform based on magnetoelastic materials. We have used micro-electro-discharge machining (micro-EDM) to fabricate magnetoelastic micro-sensor arrays. In response to a time varying magnetic field, amorphous ferromagnetic magnetoelastic thin films efficiently convert magnetic energy into elastic energy. The elastic waves mechanically deform the sensor which, for ribbon shaped elements, has a characteristic mechanical resonant frequency that is a function of its length, elasticity, and material density. Since the magnetoelastic material is also magnetostrictive, as the sensor mechanically deforms it generates magnetic flux that extends remotely about the device, which can be detected by a pickup coil. The remote query capability of this sensor technology enables a host of new monitoring applications including in-situ and in-vivo experiments. The bare sensor is capable of measuring ambient temperature and pressure, liquid density, liquid viscosity, and fluid flow velocity. The sensor platform can be used for chemical sensing when used in combination with mass-changing chemically responsive layers. Using an array of the magnetoelastic sensors one can determine multiple environmental conditions simultaneously.

关键词： Microsensors Monitoring Magnetic flux Amorphous magnetic materials Magnetostriction Magnetic resonance Magnetoelasticity Magnetic sensors Chemical sensors Magnetic materials

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Scheduling coprocessor for enhanced least-laxity-first scheduling in hard real-time systems

Scheduling coprocessor for enhanced least-laxity-first sched...

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Euromicro Conference on Real-Time Systems

作者： J. Hildebrandt F. Golatowski D. Timmermann Department of Electrical Engineering and Information Technology Institute of Applied Microelectronics and Computer Science University of Rostock Rostock Germany

Scheduling time impact on system performance increases especially when using dynamic priority algorithms, because of the enlarged computational effort at runtime. This overhead can be reduced by using dedicated hardware that does the time consuming computations necessary for scheduling. This can be a coprocessor capable of implementing dynamic scheduling algorithms which are, until now, rarely used because of their complex computations at schedule time. One of these algorithms is Least-Laxity-First (LLF). This is an optimal scheduling methodology that allows detection of time constraint violations ahead of reaching a task's deadline, but has the disadvantage of showing poor runtime behavior in some special situations ("thrashing"). In this paper, we present a universal deterministic scheduling coprocessor that implements the newly developed Enhanced Least-Laxity-First-algorithm (ELLF) which eliminates this disadvantage of LLF. Computation time of this device is rather a matter of time resolution than of the number of tasks.

关键词： Coprocessors Optimal scheduling Processor scheduling Dynamic scheduling Heuristic algorithms Scheduling algorithm Runtime System performance Hardware Time factors

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Area minimization of redundant CORDIC pipeline architectures

Area minimization of redundant CORDIC pipeline architectures

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IEEE International Conference on computer Design: VLSI in computers and Processors, (ICCD)

作者： A. Wassatsch S. Dolling D. Timmermann Department of Electrical Engineering and Information Technology Institute of Applied Microelectronics and Computer Science University of Rostock Rostock Germany

The CORDIC algorithm is used in many fields of signal processing for computation of elementary functions. Its main advantages are versatility and simplicity. When implemented in a word parallel pipeline it yields the highest possible throughput. However this solution is accompanied with increased hardware complexity and chip area requirements. The goal of this paper is to develop redundant CORDIC pipeline architectures yielding very low chip area. The speed does not decrease at all when compared with other proposals. Our novel architectures result in the smallest redundant CORDIC implementation known to the authors. It also exhibits considerably less gate switching activity thus also reducing power consumption.

关键词： Pipelines Hip Equations computer architecture Information technology microelectronics computer science Throughput Proposals Electronic switching systems

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A diagnosis method for single logic design errors in gate-level combinational circuits

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Systems and computers in Japan 1998年第6期28卷

作者： Atsushi Yoshikawa Seiji Kajihara Masahiro Numa Kozo Kinoshita Microelectronics Research Laboratories NEC Corporation Kanagawa Japan 229-11 Department of Computer Sciences and Electronics Kyushu Institute of Technology Iizuka Japan 820 Department of Electrical and Electronics Engineering Kobe University Kobe Japan 657 Department of Applied Physics Osaka University Suita Japan 565

This paper proposes a method for diagnosing logic design errors in gate-level combinational circuits, and discusses how to correct them. Some previously proposed design error models are explained at gate-level. This diagnosis method includes the vector pair analysis that has been developed for test pattern generation and fault diagnosis for multiple stuck-at faults. In vector pair analysis, logic values due to design errors are regarded as logic values caused by stuck-at faults and its results give some information on how to correct the design errors. However, since diagnosis using vector pair analysis cannot be applied to missing lines, their diagnosis uses another method based on the analysis of controlling values for input vectors with incorrect output responses. We also propose another diagnosis method for locating design errors in smaller areas, by the vector pair analysis. The experimental results for ISCAS'85 benchmark circuits show that the proposed method is effective for single design errors. © 1997 Scripta Technica, Inc. Syst Comp Jpn, 28(6): 30–39, 1997

关键词： logic design error logic verification fault diagnosis vector pair analysis

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Higher-efficiency Si LED's with standard CMOS technology

Higher-efficiency Si LED's with standard CMOS technology

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IEEE Workshop on, High Performance Electron Devices for Microwave and Optoelectronic Applications

作者： L.W. Snyman A. Biber H. Aharoni M. du Plessis B.D. Patterson P. Seinz Department of Applied Solid State Physics Paul Scherrer Institut Switzerland Carl and Emily Fuchs Institute for Microelectronics Department of Electrical and Electronic Engineering University of Pretoria Pretoria South Africa Department .of Applied Solid State Physics Centre Suisse d''Electronique et de Microtechnique Zurich Switzerland University of Pretoria from the Department of Electrical and Computer Engineering Ben-Gurion University of the Negev Beersheba Israel Carl and Emily Fuchs Institute for Microelectronics Department of Electrical and Electronic Engineering University of Pretoria South Africa Department of Applied Solid State Physics Paul Scherrer Institute Villigen Switzerland

Multi-junction silicon light emitting devices (Si LED's) were designed and realised by using standard 1.2 micron and 2 micron CMOS processes with a bipolar capability and with no modifications to the processes. The designs were optimised to increase the power conversion efficiency, quantum conversion efficiency, intensity of emission and also the uniformity of emission. The devices emit light of several nW per 5 to 10 mA at 4-30 V in the 450 to 850 nm wavelength range. All the devices operated with at least one pn junction in the field emission or avalanche breakdown mode. Quantum conversion efficiencies of up to 1/spl times/10/sup -5/ have been measured which is two and a half orders to three orders of magnitude higher than previously published values for light emission from Si p-n avalanching junctions. Some directional light emission characteristics were also observed. The developed devices are viable for on-chip electro-optical applications and also for high speed chip-to-environment electro-optical applications.

关键词： CMOS technology Electrooptic devices Silicon CMOS process Process design Design optimization Power conversion Avalanche breakdown Semiconductor device measurement Wavelength measurement

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VLIW-processors under periodic real time constraints

VLIW-processors under periodic real time constraints

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IEEE International Conference on computer Design: VLSI in computers and Processors, (ICCD)

作者： J.-P. Theis L. Thiele Applied Microelectronics Laboratory Public Research Center Henri Tudor Luxembourg Luxembourg Computer Engineering and Networks Laboratory Swiss Federal Institute of Technology Zurich Switzerland

This paper deals with the cyclo-static (periodic) scheduling of iterative instruction sequences on VLIW-processor architectures, in the case when the period is imposed (periodic real time constraints). This problem naturally arises when designing VLIW-processor architectures as I/O interfaces between cyclo-static-processor arrays and the external world. Three important mapping problems related to periodic real time constraints are discussed, depending on the VLIW-processor resource constraints and optimization criteria that are considered. Precise conditions under which there exist cycle-static schedules are formulated. Whenever possible, we present systematic and optimal mapping methodologies with polynomial solution time. The starting point is thereby a novel description of iterative instruction sequences in the form of generalized directed acyclic graphs (DAG's). Finally, an innovative VLIW-processor architecture, called Extended Periodic Operation Model (EPOM) with distributed shift register file, which optimally fits into the mapping trajectory, is presented.

关键词： Clocks Processor scheduling Polynomials Flow graphs Hardware Coprocessors microelectronics Shift registers Iterative methods Optimal control

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Deep x‐ray lithography for micromechanics and precision engineering (invited)

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Review of Scientific Instruments 1996年第9期67卷 3357-3357页

作者： Henry Guckel Wisconsin Center for Applied Microelectronics Department of Electrical and Computer Engineering University of Wisconsin‐Madison Madison WI 53706

Micromechanics, an emerging technology for sensor and actuator fabrication, has a large market potential that has already been exploited in the sensor area. Progress in actuators, devices that modify their environment and are fundamentally three dimensional, has been much more modest and is suffering from the availability of a fabrication tool with the necessary attributes. If the tool is based on photoresist technology, requirements include very large structure heights: in the millimeter range, for mask‐defined prismatic photoresist shapes with flanks that differ from 90 degrees by less than 15 arc‐seconds. Photoresist procedures that lead to these results are very different from their counterparts in the microelectronic industry. Thus, application is based on precast sheets of polymethyl methacrylate, PMMA, and solvent bonding followed by precision fly‐cutting. Exposure is based on well‐collimated x‐ray sources, synchrotrons, with flux densities that can deposit 1,600 Joules per cubic centimeter in a finite time at the correct photoresist depth. Since PMMA has an absorption length that varies with photon energy, it is 100 micrometer at 3000 eV and increases to 1 cm at 20,000 eV, beamline and exposure designs center on transmission filters that control the low energy portion of the synchrotron spectrum. Since exposure latitude is large, overexposure by a factor of 15 is allowed, beamline and exposure design are relatively simple. Experiments via the Wisconsin machine, Aladdin, and the Brookhaven 2.6‐GeV ring are being used to study the effectiveness issue of manufacturing with synchrotron radiation. Actuator test vehicles are linear and rotational magnetic micromotors with force outputs in the milli‐Newton range. High energy exposures have produced large parts with submicron precision that are finding applications in ink jet printing and precision injection molding procedures. Both device types are unique to x‐ray assisted processing.

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