In this paper, a concept for a SIL3 middleware implementing safety-related aspects is proposed. The middleware is intended to be used by applications that are written for a recently developed safety system-on-chip. Ea...
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In this paper, a concept for a SIL3 middleware implementing safety-related aspects is proposed. The middleware is intended to be used by applications that are written for a recently developed safety system-on-chip. Each module implements a low-level driver. Each driver represents a specific functionality of the system-on-chip. Once being certified conforming to IEC 61508, the middleware would enable writing safety-related applications aimed at SIL3 almost as straightforward as non-safety-related applications. A multi-core SIL3 architecture for safety-related applications is explained. In addition, possible issues that can arise during the software development are identified. Furthermore, conformance arguments on meeting SIL3 are depicted.
With the release of the second edition of the standard IEC 61508 for functional safety of electrical, electronic and programmable electronic systems, a set of methodologies and implementation techniques was presented,...
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With the release of the second edition of the standard IEC 61508 for functional safety of electrical, electronic and programmable electronic systems, a set of methodologies and implementation techniques was presented, which allows the realization and certification of safety-related solutions with on-chip redundancy. In a broader context, the standard ISO 26262 offers similar methodologies for safety solutions for automotive applications. The main focus of the research work of our institute is laid on the development and certification of safety-chips according to the standard IEC 61508. Together with an industrial partner, we are developing chip-based safety-related solutions for several industrial applications. In the same context, several semiconductor manufacturers addressed the development of such solutions in the last years, mainly with the focus on automotive applications. The present paper provides an overview of existing and planned safety chip architectures. Furthermore, a cursory analysis of the presented safety-chips is carried out with respect to the standard IEC 61508. A deep qualitative and quantitative analysis require experiments and simulations which will be carried out in future work.
The probability of failure rate and error rate are important indicators for the assessment of applications for high-speed communication systems. The paper presents causes of faults and theoretical and practical method...
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The international standard IEC/61508 provides the developer with guidelines for the design and implementation of safety related systems according to this standard. This standard states qualitative and quantitative cri...
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ISBN:
(纸本)9781424435890
The international standard IEC/61508 provides the developer with guidelines for the design and implementation of safety related systems according to this standard. This standard states qualitative and quantitative criteria in order to judge a safety related system in such a way that safety critical applications can be implemented. This paper details a quantitative criterion which is the probability of failure on low demand, known as PFD. After an introduction into this topic, the principle steps to calculate the probability of failure with the help of reliability block diagrams for different hardware architecture will be detailed and presented. The PFD-equations will be derived for a 1oo1 architecture with the help of MacLaurin series.
We study the adaptation of an optimistic time warp kernel to cross-cluster computing on the grid. Wide area communication, the primary source of overhead, is off-loaded onto dedicated routing processes. This allows th...
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ISBN:
(纸本)9780769521114
We study the adaptation of an optimistic time warp kernel to cross-cluster computing on the grid. Wide area communication, the primary source of overhead, is off-loaded onto dedicated routing processes. This allows the simulation processes to run at full speed and it thus significantly decreases the performance gap caused by the wide area distribution. Further improvements are obtained by employing message aggregation on the wide area links. We achieve many of our objectives for lazy cancellation and moderate communication, but high communication rates with aggressive cancellation remains a challenge.
We present novel concepts, technologies and potentials of optical data communication, especially for future computer architectures. The WDM (wavelength division multiplexing) and the optical wiring technologies are ex...
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The next milestone in the automotive industry is to achieve the complete autonomous driving capability. This demands high performance computing controllers and a larger number of Electronic Controller Units (ECUs) for...
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ISBN:
(纸本)9781665414937;9781665430579
The next milestone in the automotive industry is to achieve the complete autonomous driving capability. This demands high performance computing controllers and a larger number of Electronic Controller Units (ECUs) for realizing this goal. Also, the current shift towards electric cars where the battery capacity is limited, urges for new efficient approaches. Therefore, developing compact, miniaturized integrated controller that encompasses all the features is essential for minimizing the power consumption. At the same time, this approach of ECUs must also ensure the cost efficiency. To address and handle this need, the reduction in the ECUs numbers is necessary to reduce the cost factor but at the same time not compromising on the functionalities. Therefore, the approach of integrating these individual features in a single ECU is a promising way forward, i.e., system-on-Chip (SoC). To design and implement such an SoC for the automotive industry that ensures the safe operation of the controlled functions, it must follow a particular development criterion according to the ISO 26262 - functional safety of the road vehicles. This work focuses on the development of an SoC according to the ISO 26262 standard based on ARM Cortex M3 architecture which is an attractive candidate due to its low cost and low power consumption.
Various research institutions and semiconductor manufacturers have presented approaches for miniaturized safety systems based on redundant configurations in the last years. ICAS has been working on approaches for Safe...
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Various research institutions and semiconductor manufacturers have presented approaches for miniaturized safety systems based on redundant configurations in the last years. ICAS has been working on approaches for Safety systems on Chip (SoC) since 2005 and has developed several certified variants of safety SoCs in this context together with well-known safety manufacturers. In parallel, the further development of the architecture of safety SoCs was also driven forward and manifested with the ReSCU-V1 in 2018. A logical consequence is the development of the ReSCU-V2, with which further architectural developments of the safe SoC design at ICAS in Kassel have succeeded with a practically completely redundant architecture. The resulting SoC was realized on a 180 nm process from UMC. It has a chip size of 5×5 mm and consumes less than 500 mW of power.
This paper is the second part of concepts of safety networks in industries. In the first part the requirements and specifications were detailed to be considered and fulfilled to design safety bus systems. The second p...
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This paper is the second part of concepts of safety networks in industries. In the first part the requirements and specifications were detailed to be considered and fulfilled to design safety bus systems. The second part introduces data integrity in more detail and compares mathematically different architectures of safety-bus-systems.
This paper details the needs, demands and specifications to be incorporated and satisfied to design safety bus systems for modern industries. Distributed control systems in industries are connected via bus systems, an...
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This paper details the needs, demands and specifications to be incorporated and satisfied to design safety bus systems for modern industries. Distributed control systems in industries are connected via bus systems, and need efficient and uninterrupted communication between all bus stations. Therefore, it is compulsory that these communications are fault tolerant and safe. For safety related systems, further safety layers are mandatory to perform these requirements. In a safety related application it is important that the safe protocol alone is not able to achieve this task without a safety source node at one end and a safe destination node at the other. Only the combination between safety related protocol and safety related hardware nodes can accomplish the requirements for safety related networks systems.
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