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International Conference on Networked Sensing systems

作者： Hayek, Ali Schreiber, Michael Borcsok, Josef Computer Architecture and System Programming University of Kassel 34121 Kassel Germany

ISBN: (纸本)9781424479108

The development of embedded sensing applications based on integrated circuits leads to ever-growing complexity of VHDL-code and requires sophisticated testability to achieve high diagnostic coverage. The norm IEC 61508 provides a set of requirements for the implementation of safety-related software. This paper deals with the testing of VHDL modules according to IEC 61508. Since VHDL is a hardware description language and differs from traditional software languages, new testing aspects and common coverage criteria are examined with respect to basic needs resulting from those differences. Therefore, a development process according to the V-Model is introduced and a classification of VHDL modules is proposed, providing a basis on which several testing methods and exit-criteria can be evaluated with respect to specific design attributes common for each class. © 2010 IEEE.

关键词： Computer hardware description languages

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Model Based Development Methodology in Compliance with ISO 26262 for Safe Automotive ECU

Model Based Development Methodology in Compliance with ISO 2...

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2023 IEEE International Conference on Electrical, Computer and Energy Technologies, ICECET 2023

作者： Hafiz, Muhammad Ikram University of Kassel Department of Computer Architecture and System Programming Kassel Germany

ISBN: (纸本)9798350327816

This work presents a practical approach of designing a functionally safe ECU for automotive application by implementing the Model Based Development (MBD) methodology. Functional safety (FuSa) in automotive can be achieved by strictly following the processes of electrical and electronic systems development as given in the ISO 26262. The scope of FuSa encompasses the risks emerging from systematic failures and random hardware failures. One approach to mitigate these failures is the Model Based Development (MBD) on which the ISO 26262 provides guidance. This approach enables to model an ECU and accelerates an IP creation by automatic RTL code generation for rapid prototyping on an FPGA level. In this work the MBD is implemented in accordance to the ISO 26262 to design and test a hardware model of an embedded ECU. The embedded Design under Test (DUT) is simulated and its output verified in Matlab/Simulink. Upon successful results, the RTL codes of the DUT are generated for a target FPGA. The RTL codes are simulated and the functionality of the DUT is verified at the FPGA level. © 2023 IEEE.

关键词： FPGA Functional Safety HDL code generation ISO 26262 Model Based Development systematic failures

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16th International Conference on Computer Graphics, Visualization, Computer Vision and Image Processing, CGVCVIP 2022, 8th International Conference on Connected Smart Cities, CSC 2022, 7th International Conference on Big Data Analytics, Data Mining and Computational Intelligence, BigDaCI 2022, and 11th International Conference on Theory and Practice in Modern Computing, TPMC 2022 - Held at the 16th Multi Conference on Computer Science and Information systems, MCCSIS 2022

作者： Khattar, Joseph Hahn, Eike Telawi, Samer Schwarz, Michael Boercsoek, Josef ICAS Institute for Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9789898704429

Recent advancements in the embedded systems field have resulted in more complicated systems with application-specific blocks (IP cores), often known as system on Chip (SoC) devices. Several redundancy-based embedded designs provide reliability and safety for SoC in aeronautics, automotive, industrial automation, railway, and space. In this paper, a Safety system-on-Chip heterogenous1oo2 architecture is presented. The design is based on two open-source and proven in-use cores, LEON3 from Cobham Gaisler and RISCV processors SweRV EH1 from Western Digital. The SoC is implemented on a Xilinx FPGA system and supplemented with conventional peripherals from the Xilinx IP library and Cobham Gaisler. A software comparator is included for a diagnostic. Each core has independent IPs, and the software comparator evaluates data from both cores;in case of deviation, the system is rendered to an energized safe state. © MCCSIS *** rights reserved.

关键词： system-on-chip

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Influences of attacks on safety related systems

Influences of attacks on safety related systems

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23rd International Congress on Condition Monitoring and Diagnostic Engineering Management, COMADEM 2010

作者： Börcsök, J. Ugljesa, E. Dept. of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9784883254194

Several standards and guidelines give advice on the development of qualitative and quantitative criteria to evaluate safety related systems, in order to apply these in safety critical applications. These standards don't take into account the possibility of an external attack on the safety related system. In this paper, we will describe the current situation and explore methods and models for security and safety related systems with the help of Markov-models.

关键词： Markov processes

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RISC-V Based Safety system-on-Chip with Hardware Comparator 11

RISC-V Based Safety System-on-Chip with Hardware Comparator

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11th International Conference on Electronics, Communications and Networks, CECNet 2021

作者： Hahn, Eike Kalinowski, Dominik Mueller, Waldemar Abdelawwad, Mohamed Boercsoek, Josef ICAS Institute for Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781643682402

In this paper, a Safety system-on-Chip based on the open-source RISC-V processor SweRV EH1 from Western Digital is presented. A hardware comparator concept is followed. The SSoC is implemented on a Xilinx FPGA system and extended with standard peripherals from the Xilinx IP library and from Cobham Gaisler, so that the overall system has an Ethernet interface in addition to GPIO and UART. The goal is to create a complete redundancy approach with a hardware fault tolerance of nearly 1 from input to output based on the freely available RISC-V instruction set and prove its feasibility. © 2022 The authors and IOS Press.

关键词： system-on-chip

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Development of a Safe Charging Infrastructure system: Requirements, Design, Verification and Validation 10th

Development of a Safe Charging Infrastructure System: Requ...

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10th International Conference on Smart Cities and Green ICT systems, SMARTGREENS 2021, and 7th International Conference on Vehicle Technology and Intelligent Transport systems, VEHITS 2021

作者： Kivelä, Tommi Sperling, Marvin Abdelawwad, Mohamed Drabesch, Malte Schwarz, Michael Börcsök, Josef Furmans, Kai Karlsruhe Germany Department of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9783031170973

With the ongoing shift from fossil fuels towards electric mobility, there’s an increasing need for charging infrastructure for electric vehicles, both private and public. With this increasing role of charging infrastructure in day-to-day life, safety and security should be guaranteed for these systems. In this work we report on the development of an integrated electronic charging infrastructure system. The development was based on both current functional safety and charging infrastructure standards. The whole development process is presented, including requirements analysis, overall system design, safety hardware and software design, as well as the verification & validation of the safety system against the requirements set in the beginning. The presented work can be used as a basis and reference for the functional safety aspects when developing next generation charging infrastructure systems. © 2022, Springer Nature Switzerland AG.

关键词： systems analysis

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Estimation and evaluation of the 1004-architecture for safety related systems

Estimation and evaluation of the 1004-architecture for safet...

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7th International Conference on Electrical and Electronics Engineering, ELECO 2011

作者： Börcsök, Josef Hayek, Ali Computer Architecture and System Programming University of Kassel Wilhelmshöher Allee 71 34121 Kassel Germany

ISBN: (纸本)9786050102048

In the standard IEC 61508 miscellaneous architectures for safety related systems are introduced. Depending on the required safety, reliability and availability levels several architectures such as 1002-, 2002-, 1003-, and 2003-architectures can be selected. In this paper, the concept and calculation of a novel architecture is presented. The 1004-architecture (one out of four) represents an advanced safety architecture, which is 3-failure safe. This means that at least one of the four channels have to work correctly in order to trigger the safety function. In order to classify the quality of the proposed architecture for safety related systems the PFD-value is calculated. Additionally, the Markov-model for a 1004-architecture is introduced and the MTTF-value for this architecture is calculated. The results are high safety and high reliability. © 2011 Chamber of Turkish Electric.

关键词： architecture

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A filtered tuning method for a GPC controller

A filtered tuning method for a GPC controller

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IET Irish Signals and systems Conference, ISSC 2010

作者： Schwarz, M.H. Cox, C.S. Börcsök, J. Department of Computer Architecture and System Programming Safety Computer Technology University of Kassel Kassel Germany Control Systems Centre University of Sunderland Sunderland United Kingdom Department of Computer Architecture and System Programming University of Kassel Kassel Germany

ISBN: (纸本)9781849192521

This paper presents a new tuning method based on model parameters identified in closed-loop. For classical controllers such as PI(D) controllers a large number of simple tuning methods for various application areas exist. However, when it comes to designing a generalised predictive controller (GPC) four parameters have to be specified. To choose those parameters is not a trivial task since they are not directly related to control or regulation performance. The presented tuning method exploits model-parameters to select suitable controller parameters. Additionally, a Rhinehart filter is incorporated in the design to decrease the impact of noise, therefore, a fifth parameter has to be optimised. The proposed method has been tested in simulation and on a real system.

关键词： Controllers

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Considering security aspects in safety environment

Considering security aspects in safety environment

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11th International Probabilistic Safety Assessment and Management Conference and the Annual European Safety and Reliability Conference 2012, PSAM11 ESREL 2012

作者： Ugljesa, E. Boercsoeck, J. Computer Architecture and System Programming Universität Kassel Wilhelmshöher Allee 73 Kassel Germany

ISBN: (纸本)9781622764365

The present paper deals with the quantitative analysis of the safety-related systems. The configuration of such safety-related system is composed of channels that include both detectable and undetectable failures. It also deals with a possible calculating model of a safety-intrusion and their consequences on the safety-related system, but it is also important to note at this point that information and experimental results for this model with real data are not (public) available yet. This model should clearly demonstrate the possible calculation of safety-intrusion model, based on high reliable architecture, with the help of Markov models.

关键词： Markov processes

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PARBLO:Page-Allocation-Based DRAM Row Buffer Locality Optimization

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Journal of Computer Science & Technology 2009年第6期24卷 1086-1097页

作者：米伟冯晓兵贾耀仓陈莉薛京灵 Key Laboratory of Computer System and Architecture Institution of Computing Technology Chinese Academy of Sciences Graduate University of Chinese Academy of Sciences Programming Languages and Compilers Group School of Computer Science and Engineering University of New South Wales

DRAM row buffer conflicts can increase memory access latency significantly. This paper presents a new pageallocation-based optimization that works seamlessly together with some existing hardware and software optimizations to eliminate significantly more row buffer conflicts. Validation in simulation using a set of selected scientific and engineering benchmarks against a few representative memory controller optimizations shows that our method can reduce row buffer miss rates by up to 76% （with an average of 37.4%）. This reduction in row buffer miss rates will be translated into performance speedups by up to 15% （with an average of 5%）.

关键词： DRAM row buffer page allocation locality optimization

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