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检索条件"机构=Architectures and Compilers for Embedded Systems Laboratory Center for Embedded Computer Systems"
23 条 记 录,以下是1-10 订阅
Optimized training for convolutional neural network using enhanced grey wolf optimization algorithm
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Informatica (Slovenia) 2021年 第5期45卷 731-739页
作者: Guernine, Akram Kimour, Mohamed Tahar Laboratory of Embedded Systems Department of Computer Science University of Badji Mokhtar-Annaba Po Box.12 Annaba Sidi Amar Algeria Center of research on environment Annaba Algeria
Convolutional Neural Networks (CNNs) are widely used in image classification tasks and have achieved significant performance. They have different applications with great success, especially in the medical field. The c... 详细信息
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Exploration of Optimizing FPGA-based Qubit Controller for Experiments on Superconducting Quantum Computing Hardware
Exploration of Optimizing FPGA-based Qubit Controller for Ex...
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IEEE International Conference on Electro-Information Technology
作者: Hans Johnson Silvia Zorzetti Jafar Saniie Department of Electrical and Computer Engineering Embedded Computing and Signal Processing (ECASP) Research Laboratory Illinois Institute of Technology Chicago IL U.S.A. Superconducting Quantum Materials and Systems Center (SQMS) Fermi National Accelerator Laboratory Batavia IL U.S.A.
This work explores avenues and target areas for optimizing FPGA-based control hardware for experiments conducted on superconducting quantum computing systems and serves as an introduction to some of the current resear...
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Demonstrating the Potential of Adaptive LMS Filtering on FPGA-Based Qubit Control Platforms for Improved Qubit Readout in 2D and 3D Quantum Processing Units
Demonstrating the Potential of Adaptive LMS Filtering on FPG...
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Quantum Computing and Engineering (QCE), IEEE International Conference on
作者: Hans Johnson Nicholas Bornman Taeyoon Kim David Van Zanten Silvia Zorzetti Jafar Saniie Department of Electrical and Computer Engineering Embedded Computing and Signal Processing (ECASP) Research Laboratory Illinois Institute of Technology Chicago IL U.S.A. Fermi National Accelerator Laboratory Superconducting Quantum Materials and Systems (SQMS) Center Batavia IL U.S.A. Department of Physics and Astronomy Center for Applied Physics and Superconducting Technologies (CAPST) Northwestern University Evanston IL U.S.A.
Advancements in quantum computing underscore the critical need for sophisticated qubit readout techniques to accurately discern quantum states. This abstract presents our research intended for optimizing readout pulse... 详细信息
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ARB-NET: A novel adaptive monitoring platform for stacked mesh 3D NoC architectures
ARB-NET: A novel adaptive monitoring platform for stacked me...
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Asia and South Pacific Design Automation Conference
作者: Amir-Mohammad Rahmani Khalid Latif Kameswar Rao Vaddina Pasi Liljeberg Juha Plosila Hannu Tenhunen Turku Center for Computer Science Finland Department of Information Technology Embedded Computer Systems Laboratory University of Turku Finland
The emerging three-dimensional integrated circuits (3D ICs) offer a promising solution to mitigate the barriers of interconnect scaling in modern systems. In order to exploit the intrinsic capability of reducing the w... 详细信息
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An Efficient Hybridization Scheme for Stacked Mesh 3D NoC Architecture
An Efficient Hybridization Scheme for Stacked Mesh 3D NoC Ar...
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Euromicro Conference on Parallel, Distributed and Network-Based Processing
作者: Amir-Mohammad Rahmani Pasi Liljeberg Juha Plosila Hannu Tenhunen Turku Center for Computer Science Finland Embedded Computer Systems Laboratory Department of Information Technology University of Turku Finland
Three-dimensional (3D) integration is a viable design paradigm to overcome the existing interconnect bottleneck in integrated systems and enhance system power/performance characteristics. In order to exploit the intri... 详细信息
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OpenMP directive extension for BlackFin 561 dual core processor
OpenMP directive extension for BlackFin 561 dual core proces...
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6th IEEE International Conference on computer and Information Technology, CIT 2006
作者: Seo, Hee Kim, Seon Wook Compilers and Embedded Systems Laboratory Department of Electronics and Computer Engineering Korea University Seoul Korea Republic of
Many researchers and vendors are exploiting the increasing number of transistors to build chip multiprocessors (CMPs) by partitioning a chip into multiple simple ILP cores. As in traditional multiprocessors, CMPs extr... 详细信息
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OpenMP Directive Extension for BlackFin 561 Dual Core Processor
OpenMP Directive Extension for BlackFin 561 Dual Core Proces...
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International Conference on computer and Information Technology (CIT)
作者: Hee Seo Seon Wook Kim Compilers and Embedded Systems Laboratory Department of Electronics and Computer Engineering Korea University of Technology and Education Seoul South Korea
Many researchers and vendors are exploiting the increasing number of transistors to build chip multiprocessors (CMPs) by partitioning a chip into multiple simple ILP cores. As in traditional multiprocessors, CMPs extr... 详细信息
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Static Energy Saving Through Multi-Bank Memory Architecture
Static Energy Saving Through Multi-Bank Memory Architecture
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International Conference on embedded computer systems: architectures, Modeling and Simulation (IC-SAMOS)
作者: Sebastien Lafond Johan Lilius Embedded Systems Laboratory Turku Center for Computer Science Turku Finland Department of Information Technologies Abo Akademi University Abohar Finland
Managing the energy consumption of embedded systems has become a major problem with the increasing demand for portable electronic devices. This paper proposes a multi-bank memory architecture as a solution to decrease... 详细信息
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Functional validation of programmable architectures
Functional validation of programmable architectures
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Euromicro Symposium on Digital System Design
作者: P. Mishra N. Dutt Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine USA
Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current system-on-chip design methodology. A critical challenge in valid... 详细信息
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Synthesis-driven exploration of pipelined embedded processors
Synthesis-driven exploration of pipelined embedded processor...
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International Conference on VLSI Design
作者: P. Mishra A. Kejariwal N. Dutt Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
Recent advances on language based software toolkit generation enables performance driven exploration of embedded systems by exploiting the application behavior. There is a need for an automatic generation of hardware ... 详细信息
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