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检索条件"机构=Architectures and Compilers for Embedded Systems Laboratory Center for Embedded Computer Systems"
23 条 记 录,以下是11-20 订阅
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Instruction set compiled simulation: a technique for fast and flexible instruction set simulation  03
Instruction set compiled simulation: a technique for fast an...
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Design Automation Conference
作者: M. Reshadi P. Mishra N. Dutt Architectures and Compilers for Embedded Systems Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and time-to-market pressure, performance is the mos... 详细信息
来源: 评论
A methodology for validation of microprocessors using equivalence checking
A methodology for validation of microprocessors using equiva...
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International Workshop on Microprocessor Test and Verification (MTV)
作者: P. Mishra N. Dutt Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. Validation of such processor architect... 详细信息
来源: 评论
Rapid exploration of pipelined processors through automatic generation of synthesizable RTL models
Rapid exploration of pipelined processors through automatic ...
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International Workshop on Rapid System Prototyping (RSP)
作者: P. Mishra A. Kejariwal N. Dutt Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
As embedded systems continue to face increasingly higher performance requirements, deeply pipelined processor architectures are being employed to meet desired system performance. System architects critically need mode... 详细信息
来源: 评论
Automatic functional test program generation for pipelined processors using model checking
Automatic functional test program generation for pipelined p...
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IEEE International High-Level Design Validation and Test Workshop
作者: P. Mishra N. Dutt Architectures and Compilers for Embedded Systems Center for Embedded Computer Systems University of California Irvine CA USA
Formal techniques offer an opportunity to significantly reduce the cost of microprocessor verification. We propose a model checking based approach to automatically generate functional test programs for pipelined proce... 详细信息
来源: 评论
New directions in compiler technology for embedded systems
New directions in compiler technology for embedded systems
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Asia and South Pacific Design Automation Conference
作者: N. Dutt A. Nicolau H. Tomiyama A. Halambi Architectures and Compilers for Embedded Systems Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
Traditionally, compiler technology has focused on the generation of code with the goal of improving performance for a variety of applications running on general-purpose processor architectures. In the embedded system ... 详细信息
来源: 评论
Processor-memory co-exploration driven by a Memory-Aware Architecture Description Language
Processor-memory co-exploration driven by a Memory-Aware Arc...
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International Conference on VLSI Design
作者: P. Mishra P. Grun N. Dutt A. Nicolau Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine CA USA
Memory represents a major bottleneck in modern embedded systems. Traditionally, memory organizations for programmable systems assumed a fixed cache hierarchy. With the widening processor-memory gap, more aggressive me... 详细信息
来源: 评论
New directions in compiler technology for embedded systems (embedded tutorial)  01
New directions in compiler technology for embedded systems (...
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Proceedings of the 2001 Asia and South Pacific Design Automation Conference
作者: Nikil Dutt Alex Nicolau Hiroyuki Tomiyama Ashok Halambi Architectures and Compilers for Embedded System Laboratory Center for Embedded Systems University of California Irvine Irvine CA
Traditionally, compiler technology has focused on the generation of code with the goal of improving performance for a variety of applications running on general-purpose processor architectures. In the embedded system ...
来源: 评论
Automatic validation of pipeline specifications
Automatic validation of pipeline specifications
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IEEE International High-Level Design Validation and Test Workshop
作者: P. Mishra N. Dutt A. Nicolau Architectures and Compilers for Embedded Systems (ACES) Laboratory University of California Irvine CA USA
Recent approaches on language-driven Design Space Exploration (DSE) use Architectural Description Languages (ADL) to capture the processor architecture, generate automatically a software toolkit (including compiler, s... 详细信息
来源: 评论
Architecture exploration of parameterizable EPIC SOS architectures (poster paper)  00
Architecture exploration of parameterizable EPIC SOS archite...
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Proceedings of the conference on Design, automation and test in Europe
作者: Ashok Halambi Radu Cornea Peter Grun Nikil Dutt Alex Nicolau Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine CA
No abstract available.
来源: 评论
Architecture exploration of parameterizable EPIC SOC architectures
Architecture exploration of parameterizable EPIC SOC archite...
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Design, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000
作者: Halambe, Ashok Cornea, Radu Grun, Peter Dutt, Nikil Nicolau, Alex Laboratory Center for Embedded Computer Systems University of California Irvine CA 92697-3425 United States
来源: 评论