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检索条件"机构=Assembly Test Technology Development"
129 条 记 录,以下是61-70 订阅
排序:
Enforcing Causality and Passivity of Neural Network Models of Broadband S-Parameters
Enforcing Causality and Passivity of Neural Network Models o...
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IEEE Topical Meeting on Electrical Performance of Electronic Packaging (EPEPS)
作者: Hakki M. Torun Ahmet C. Durgun Kemal Aygün Madhavan Swaminathan 3D Systems Packaging Research Center (PRC) Georgia Institute of Technology Atlanta GA Assembly and Test Technology Development Intel Corporation Chandler AZ
This paper proposes a method to ensure that S-Parameters generated using neural network (NN) models are physically consistent and can be safely used in subsequent time-domain simulations. This is achieved by introduci... 详细信息
来源: 评论
Heterogeneous Integration Using Omni-Directional Interconnect Packaging
Heterogeneous Integration Using Omni-Directional Interconnec...
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International Electron Devices Meeting (IEDM)
作者: A. A. Elsherbini S. M. Liff J. M. Swan Components Research Technology & Manufacturing Group Intel Corp. Chandler AZ USA Assembly & Test Technology Development Technology & Manufacturing Group Intel Corp. Chandler AZ USA
We present a new packaging building block for 3D integrated circuits: Omni Directional Interconnect (ODI). It adds a new degree of freedom in packaging that enables combining the high bandwidth benefit of standard 3D ...
来源: 评论
A method to model Vccinfeedthrough Noise in Microprocessors with Fully Integrated Voltage Regulators - Distributed Formulation
A method to model Vccinfeedthrough Noise in Microprocessors ...
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IEEE Topical Meeting on Electrical Performance of Electronic Packaging (EPEPS)
作者: Srinivasan Govindan Krishna Bharath Dipanjan Gope Srikrishnan Venkataraman Nikita Ambasana Scalable Performance CPU Development Group Intel Technology India Pvt. Ltd Bangalore India Assembly Test and Technology Development Intel Corporation Chandler Arizona Department of Electrical Communication Engineering Indian Institute of Science Bangalore India
Modern high performance server microprocessors processors have built-in Fully Integrated Voltage Regulators (FIVR) to generate the on-chip power domains. The multiple FIVRs in the chip share a common input power netwo... 详细信息
来源: 评论
Phase Change Material Compact Model: Validation and Sensitivity as Thermal Interface Material
Phase Change Material Compact Model: Validation and Sensitiv...
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Electrical Design of Advanced Packaging and Systems Symposium, EDAPS
作者: Javed Shaikh Je-Young Chang Weihua Tang Assembly and Test Technology Development Intel Corporation Bangalore India
The Phase Change Material (PCM) is explored as potential passive thermal solution in package thermal design due to the burst power requirements in the mobile applications. In this paper, a compact model based on the a... 详细信息
来源: 评论
Understanding Underfill Degradation in Reliability testing Conditions for ADAS Package development
Understanding Underfill Degradation in Reliability Testing C...
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Electronic Components and technology Conference (ECTC)
作者: Ziyin Lin Vijay Subramanian Pramod Malatkar Nisha Ananthakrishnan Assembly &Test Technology Development Intel Corporation Chandler AZ USA
Harsh advanced driver assistance systems (ADAS) user conditions lead to stringent reliability requirements for electronic packages. In order to develop packages that meet ADAS reliability target, it is necessary to no... 详细信息
来源: 评论
Robust temperature and humidity dependent electrical package material characterization
Robust temperature and humidity dependent electrical package...
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IEEE Conference on Electrical Performance of Electronic Packaging and Systems
作者: Yidnekachew S. Mekonnen Michael J. Hill Leigh Wojewoda Kemal Aygun Assembly and Test Technology Development Intel Corporation Chandler AZ
Increasing high speed data rates for digital signaling and emerging technologies such as 5G have expanded the frequency range of interest for package dielectric materials characterization and generated interest in cha... 详细信息
来源: 评论
Method to Model Input Voltage Ripple in Multi-Domain Fully Integrated Voltage Regulators
Method to Model Input Voltage Ripple in Multi-Domain Fully I...
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Electrical Design of Advanced Packaging and Systems Symposium, EDAPS
作者: Srinivasan Govindan Dipanjan Gope Krishna Bharath Srikrishnan Venkataraman Department of Electrical Communication Engineering Indian Institute of Science Bangalore India Assembly Test and Technology Development Intel Corporation Chandler Arizona Scalable Performance CPU Development Group Intel Technology India Pvt. Ltd Bangalore India
The on-chip power domains of the latest generation of high performance server microprocessors are generated using integrated switched mode dc-dc converters also known as Fully Integrated Voltage regulators (FIVR). The... 详细信息
来源: 评论
Design of Low-loss Transmission Lines with Common Mode Suppression for Packages
Design of Low-loss Transmission Lines with Common Mode Suppr...
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IEEE Conference on Electrical Performance of Electronic Packaging and Systems
作者: Ahmet C. Durgun Kemal Aygun Assembly and Test Technology Development Intel Corporation Chandler AZ USA
Increasing data rates of high speed serial interfaces forces the insertion loss and common mode (CM) noise requirements to be tighter. This paper addresses both of these challenges by introducing a new low-loss transm... 详细信息
来源: 评论
Temperature Impact on Surface Roughness Modeling for On-Package High Speed Interconnects
Temperature Impact on Surface Roughness Modeling for On-Pack...
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IEEE Conference on Electrical Performance of Electronic Packaging and Systems
作者: Cemil S. Geyik Zhichao Zhang Sean R. Christ Leigh E. Wojewoda Kemal Aygun Assembly Test Technology Development Intel Corporation Chandler Arizona USA
The introduction of new dielectrics and adhesion promotion techniques for future interconnect technology generations is one of the key enablers for lower loss and higher bandwidth. However, temperature increase due to... 详细信息
来源: 评论
Method to Model Vccin Feedthrough Noise in Multi-Domain Fully Integrated Voltage Regulators
Method to Model Vccin Feedthrough Noise in Multi-Domain Full...
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IEEE Conference on Electrical Performance of Electronic Packaging and Systems
作者: Srinivasan Govindan Krishna Bharath Dipanjan Gope Srikrishnan Venkataraman Department of Electrical Communication Engineering Indian Institute of Science Bangalore India Assembly Test and Technology Development Intel Corporation Chandler Arizona Scalable Performance CPU Development Group Intel Technology India Pvt. Ltd Bangalore India
The on-chip power supply domains of high performance server microprocessors are generated using built-in switching voltage regulators (also know as Fully Integrated Voltage regulators-FIVRs). The advantages of integra... 详细信息
来源: 评论