Stepped frequency signal is an important high distance resolution signal, this property is realized by combining several pulse signal, so it is easy to be effected by target's radial motion. Here we analyzed how t...
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In this paper, a kind of high speed and parallel hardware architecture is designed with one TMS320C6678 and one XC6VSX315T. This system is used for the pulsed Doppler radar. To map the algorithm effectively, pipeline ...
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ISBN:
(纸本)9781849196031
In this paper, a kind of high speed and parallel hardware architecture is designed with one TMS320C6678 and one XC6VSX315T. This system is used for the pulsed Doppler radar. To map the algorithm effectively, pipeline optimization on system and instruction levels are adopted, and various factors are taken into consideration, such as system complexity, communication between the processors, bandwidth of output signal.
This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA...
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This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA...
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ISBN:
(纸本)9781612847016
This article describes a variety of FPGA-based radar signal generator. This system is connected to the host, binding data from the software interface, through the PCI bus transfer stored in the system. Within the FPGA to achieve DDS signal generator, and finally through the digital-analog converter output. Finally, the system resource utilization and the actual results are given.
This paper analyses the design and implementation of a small-scale dual-interface radar data recorder based on DSP+FPGA. It has two types of interfaces: solid-state IDE hard disk and RJ45. The recorder can save sampli...
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This paper analyses the design and implementation of a small-scale dual-interface radar data recorder based on DSP+FPGA. It has two types of interfaces: solid-state IDE hard disk and RJ45. The recorder can save sa...
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This paper analyses the design and implementation of a small-scale dual-interface radar data recorder based on DSP+FPGA. It has two types of interfaces: solid-state IDE hard disk and RJ45. The recorder can save sampling data of original radar waveforms in real time for further analysis and validation. It adapts to a variety of application environments and has a high storage speed and reliable operation performance. It can be widely used in radar testing and flight experiments.
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