The Ray Tracing rendering algorithm can produce high-fidelity images of 3-D scenes, including shadow effects, as well as reflections and transparencies. This is currently done at a processing speed of at most 30 frame...
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The Ray Tracing rendering algorithm can produce high-fidelity images of 3-D scenes, including shadow effects, as well as reflections and transparencies. This is currently done at a processing speed of at most 30 frames per second. Therefore, actual implementations of the algorithm are not yet suitable for interactive real-time rendering, which is required in games and virtual reality based applications. Fortunately, the algorithm allows for massive parallelization of its computations. In this paper, we present a parallel architecture for ray tracing based on a uniform spatial subdivision of the scene and exploiting an embedded computation of ray-triangle intersections. This approach allows for a significant acceleration of intersection computations, as well as, a reduction of the total number of the required intersections checks. Furthermore, it allows for these checks to be performed in parallel and in advance for each ray. In this paper we discuss and analyze an ASIP-based implementation using FPGAs and a GPGPU-based parallel implementation of the proposed architecture. The performance of both implementations are reported and compared.
Effective exploitation of the application-specific parallel patterns and computation operations through their direct implementation in hardware is the base for construction of high-quality application-specific (re-)co...
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Effective exploitation of the application-specific parallel patterns and computation operations through their direct implementation in hardware is the base for construction of high-quality application-specific (re-)configurable application specific instruction set processors (ASIPs) and hardware accelerators for modern highly-demanding applications. Although it receives a lot of attention from the researchers and practitioners, a very important problem of hardware reuse in ASIP and accelerator synthesis is clearly underestimated and does not get enough attention in the published research. This paper is an effect of an industry and academic collaborative research. It analyses the problem of hardware sharing, shows its high practical relevance, as well as a big influence of hardware sharing on the major circuit and system parameters, and its importance for the multi-objective optimization and tradeoff exploitation. It also demonstrates that the state-of-the-art synthesis tools do not sufficiently address this problem and gives several guidelines related to enhancement of the hardware reuse.
The evolution of science has been supported by complex computerized infrastructures with growing interest in simulation based experiments. This trend can also be observed in Software engineering. Our capacity of acqui...
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Software differs from most manufactured products because it is intangible. This characteristic makes it difficult to detect, control, and understand how it evolves. This paper presents an approach based on software vi...
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Business processes modeling projects are increasingly widespread in organizations. Companies have several processes to be identified and modeled. They usually invest much in hiring expert consultants to do such job. H...
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ISBN:
(纸本)9789898425065
Business processes modeling projects are increasingly widespread in organizations. Companies have several processes to be identified and modeled. They usually invest much in hiring expert consultants to do such job. However, they still find no guidelines to help them estimate how much a process modeling project will cost or how long this will take. We propose an approach to estimate the effort required to conduct a BPM project and discuss results obtained from over 50 projects in a large Brazilian company.
Complexity and dynamism of day-to-day activities in organizations are inextricably linked, one impacting the other, increasing the challenges for constant adaptation of the way to organize work to address emerging dem...
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ISBN:
(纸本)9789898425065
Complexity and dynamism of day-to-day activities in organizations are inextricably linked, one impacting the other, increasing the challenges for constant adaptation of the way to organize work to address emerging demands. In this scenario, there are a variety of information, insight and reasoning being processed between people and systems, during process execution. We argue that process variations could be decided in real time, using context information collected. This paper presents a proposal for a business process line cycle, with a set of activities encapsulated in the form of components as central artefact. We explain how composition and adaptation of work may occur in real time and discuss a scenario for this proposal.
The main knowledge management challenges are to capture, store and reuse contextual knowledge generated during interactions that occur daily in an organization. In this paper, we propose an activity context-aware arch...
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Real time rendering of three-dimensional scenes in high photorealistic detail is a hard task, such as in the Ray Tracing rendering algorithm. However, parallel implementations of Ray Tracing have been enabling real ti...
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Real time rendering of three-dimensional scenes in high photorealistic detail is a hard task, such as in the Ray Tracing rendering algorithm. However, parallel implementations of Ray Tracing have been enabling real time performance, as the algorithm is embarrassingly parallel. Thus, a custom parallel design in hardware is likely to achieve an acceptable performance. In this paper, we propose a hardware parallel architecture capable of dealing with the main desirable features of Ray Tracing, such as shadows and reflection effects, imposing low area cost and acceptable rendering performance.
Weightless Artificial Neural Networks have proved to be a promising paradigm for classification tasks. This work introduces the WANN-Tagger, which makes use of weightless artificial neural networks for labelling Portu...
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ISBN:
(纸本)9789898425324
Weightless Artificial Neural Networks have proved to be a promising paradigm for classification tasks. This work introduces the WANN-Tagger, which makes use of weightless artificial neural networks for labelling Portuguese sentences, tagging each of its terms with its respective part-of-speech. A first experimental evaluation using the CETENFolha corpus indicates the usefulness of this paradigm and shows that it outperforms traditional feedforward neural networks in both accuracy and training time, and also that it is competitive in accuracy with the Hidden Markov Model in some cases. Additionally, WANN-Tagger shows itself capable of incrementally learning new tagged sentences during runtime.
PatternLab for proteomics is a one-stop shop computational environment for analyzing shotgun proteomic data. Its modules provide means to pinpoint proteins/peptides that are differentially expressed and those that are...
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