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Experimental measurement of growth patterns on fossil corals:Secular variation in ancient Earth-Sun distances

Chinese science Bulletin 2010年第35期55卷 4010-4017页

作者： ZHANG WeiJia1,3,4,LI ZhengBin2,3 & LEI Yang1 1 Department of Physics,Peking University,Beijing 100871,China 2 Department of Electrical engineering and computer science,Peking University,Beijing 100871,China 3 State Key Laboratory of Advanced Optical Communication systems & Networks,Peking University,Beijing 100871,China 4 Committee of Yuanpei Honors program,Peking University,Beijing 100871,China Department of Physics Peking University Beijing 100871 China State Key Laboratory of Advanced Optical Communication Systems & Networks Peking University Beijing 100871 China Committee of Yuanpei Honors Program Peking University Beijing 100871 China Department of Electrical Engineering and Computer Science Peking University Beijing 100871 China

In recent years,much attention has been given to the increase in the Earth-Sun distance,with the modern rate reported as 5-15 m/cy on the basis of astronomical ***,traditional methods cannot measure the ancient leaving rates,so a myriad of research attempting to provide explanations were met with unmatched *** this paper we consider that the growth patterns on fossils could reflect the ancient Earth-Sun *** mechanical analysis of both the Earth-Sun and Earth-Moon systems,these patterns confirmed an increase in the Earth-Sun *** a large number of well-preserved specimens and new technology available,both the modern and ancient leaving rates could be measured with high precision,and it was found that the Earth has been leaving the Sun over the past 0.53 billion *** Earth's semi-major axis was 146 million kilometers at the beginning of the Phanerozoic Eon,equating to 97.6% of its current *** modern leaving rates are 5-14 m/cy,whereas the ancient rates were much *** results indicate a special expansion with an average expansion coefficient of 0.57H0 and deceleration in the form of Hubble *** the basis of experimental results,the Earth's semi-major axis could be represented by a simple formula that matches fossil measurements.

关键词：地球太阳古代距离生长模式实验石珊瑚量化

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Ranking in Collaboration Networks Using a Relationship Intensity Metric

Ranking in Collaboration Networks Using a Relationship Inten...

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Simpósio Brasileiro de Sistemas Colaborativos

作者： Vinicius Pires M. Freire Daniel R. Figueiredo COPPE/System Engineering and Computer Science Program (PESC) Federal University of Rio de Janeiro Rio de Janeiro Rio de Janeiro Brazil

Collaboration networks are social networks in which relationships represent some kind of professional collaboration. The study of collaboration networks can help identify members that are important or influential within a given community. This work is divided into two parts. The first part is a study of the topological properties of two collaboration networks: the global collaboration network and the Brazilian collaboration network of authors of scientific papers within the area of computer science. The second part presents a ranking metric for vertices based on the intensities of their relationships. Using the proposed metric and other more classical metrics, we rank the researchers in Brazil in computer science. The proposed metric was compared with subjective evaluation of researchers made by CNPq. The results show the effectiveness of the proposed metric in identifying influential researchers when compared to another metrics in the literature.

关键词： Measurement Collaboration computer science Manuals Biology Communities Computational modeling

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WANN-Tagger: A weightless artificial neural network tagger for the portuguese language

WANN-Tagger: A weightless artificial neural network tagger f...

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作者： Carneiro, Hugo C. C. França, Felipe M. G. Lima, Priscila M. V. Systems Engineering and Computer Science Program/COPPE Universidade Federal do Rio de Janeiro Caixa Postal 68511 21941-972 Rio de Janeiro RJ Brazil Department of Mathematics Universidade Federal Rural do Rio de Janeiro Km 47 Campus Universitário BR-465 23890-000 Seropédica RJ Brazil

ISBN: (纸本)9789898425324

Weightless Artificial Neural Networks have proved to be a promising paradigm for classification tasks. This work introduces the WANN-Tagger, which makes use of weightless artificial neural networks for labelling Portuguese sentences, tagging each of its terms with its respective part-of-speech. A first experimental evaluation using the CETENFolha corpus indicates the usefulness of this paradigm and shows that it outperforms traditional feedforward neural networks in both accuracy and training time, and also that it is competitive in accuracy with the Hidden Markov Model in some cases. Additionally, WANN-Tagger shows itself capable of incrementally learning new tagged sentences during runtime.

关键词： Feedforward neural networks

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Energy efficient mapping and voltage islanding for regular NoC under design constraints

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International Journal of High Performance systems Architecture 2010年第3-4期2卷 132-144页

作者： Ghosh, Pavel Sen, Arunabha Computer Science Program School of Computing Informatics and Decision Systems Engineering Arizona State University Tempe AZ 85281 United States

Computational energy consumption of the processing elements (PEs) of a NoC can be significantly reduced by scaling down their voltage levels. This creates clusters of adjacent PEs operating at the same voltage level, known as voltage islands. Excessive number of voltage islands is undesirable from the physical design perspective and due to the overhead of level shifter energy consumption between adjacent voltage islands. Considering these issues during mapping of the PEs to the NoC routers, can potentially lead to acceptable solutions with reduced overall energy consumption. In this paper, we formulate the mapping problem as an optimisation problem. We present both optimal solution, obtained by solving a mixed integer linear program (MILP), and heuristic solution based on random greedy selection. Experimental results using benchmark and real applications show that the heuristic finds near-optimal solution in almost all cases in a very small fraction of the time required to achieve the optimal solution. Copyright © 2010 Inderscience Enterprises Ltd.

关键词： Network-on-chip

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Power efficient voltage islanding for systems-on-chip from a floorplanning perspective 10

Power efficient voltage islanding for Systems-on-chip from a...

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Design, Automation and Test in Europe Conference and Exhibition

作者： Pavel Ghosh Arunabha Sen Computer Science and Engineering Program School of Computing Informatics and Decision Systems Engineering Arizona State University Tempe AZ USA

ISBN: (纸本)9783981080162

Power consumption can be significantly reduced in systems-on-Chip (SoC) by scaling down the voltage levels of the Processing Elements (PEs). The power efficiency of this Voltage Islanding technique comes at the cost of energy and area overhead due to the level shifters between voltage islands. Moreover, from the physical design perspective it is not desirable to have an excessive number of voltage islands on the chip. Considering voltage islanding at an early phase of design as during floorplanning of the PEs can address various of these issues. In this paper, we propose a new cost function for the floorplanning objective different from the traditional floorplanning objective. The new cost function not only includes the overall area requirement, but also incorporates the overall power consumption and the design constraint imposed on the maximum number of voltage islands. We propose a greedy heuristic based on the proposed cost function for the floorplanning of the PEs with several voltage islands. Experimental results using benchmark data study the effect of several parameters on the outcome of the heuristic. It is evident from the results that power consumption can be significantly reduced using our algorithm without significant area overhead. The area obtained from the heuristic is also compared with the optimal, and found to be within 4% of the optimal on average, when area minimization is given the priority.

关键词： Voltage Energy consumption Cost function Power engineering and energy Minimization Very large scale integration computer science Power engineering computing Informatics systems engineering and theory

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Hardware particle swarm optimization based on the attractive-repulsive scheme for embedded applications

Hardware particle swarm optimization based on the attractive...

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2010 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2010

作者： Muñoz, Daniel M. Llanos, Carlos H. Dos S. Coelho, Leandro Ayala-Rincón, Mauricio Department of Mechanical Engineering Automation and Control Group/GRACO University of Brasilia Brasilia DF Brazil Industrial and Systems Engineering Graduate Program LAS/PPGPES Pontifical Catholic University of Parana Curitiba Parana Brazil Department of Computer Science and Mathematics University of Brasilia Brasilia DF Brazil

ISBN: (纸本)9780769543147

Particle Swarm Optimization (PSO) algorithms have been proposed to solve engineering problems that require to find an optimal point of operation. However, the PSO algorithm suffers from premature convergence and high elapsed time when solving multimodal and large scale engineering problems. This problem becomes an evident drawback for embedded applications in which the microcontrollers often operates at low computational capacity. This paper proposes a hardware implementation of a parallel self-adaptive PSO algorithm based on an attractive-repulsive scheme and using the efficient floating-point arithmetic which performs computations with large dynamic range and high precision. The parallel capabilities of the PSO are exploited by implementing parallel particles directly in hardware in order to decrease the running time. In addition, the attractive-repulsive technique avoids the premature convergence problem by self-adapting the swarm behavior according to its diversity. Synthesis and simulation results for benchmark test problems were performed, demonstrating the correctness of the proposed architectures. Finally, an elapsed time comparison between the hardware and software implementations shows the suitableness of the proposed architecture for embedded applications. © 2010 IEEE.

关键词： Global optimization

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Semidefinite relaxation of quadratic optimization problems

Semidefinite relaxation of quadratic optimization problems

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作者： Luo, Zhi-Quan Ma, Wing-Kin So, Anthony Ye, Yinyu Zhang, Shuzhong Department of Electrical and Computer Engineering University of Minnesota United States Department of Electronic Engineering Chinese University of Hong Kong Shatin Hong Kong Hong Kong Department of Systems Engineering and Engineering Management Chinese University of Hong Kong Hong Kong Hong Kong Department of Management Science and Engineering MSE Industrial Affiliates Program Stanford University United States

In recent years, the semidefinite relaxation (SDR) technique has been at the center of some of very exciting developments in the area of signal processing and communications, and it has shown great significance and relevance on a variety of applications. Roughly speaking, SDR is a powerful, computationally efficient approximation technique for a host of very difficult optimization problems. In particular, it can be applied to many nonconvex quadratically constrained quadratic programs (QCQPs) in an almost mechanical fashion, including the following problem: © 2010 IEEE.

关键词： Signal processing

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Analyzing shotgun proteomic data with patternlab for proteomics

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Current Protocols in Bioinformatics 2010年第SUPPL. 30期Chapter 13卷 13.13.1-13.13.15页

作者： Carvalho, Paulo C. Yates III, John R. Barbosa, Valmir C. Systems Engineering and Computer Science Program COPPE Federal University of Rio de Janeiro Rio de Janeiro Brazil Brazil Scripps Research Institute La Jolla CA United States

PatternLab for proteomics is a one-stop shop computational environment for analyzing shotgun proteomic data. Its modules provide means to pinpoint proteins/peptides that are differentially expressed and those that are unique to a state. It can also cluster the ones that share similar expression profiles in time-course experiments, as well as help in interpreting results according to Gene Ontology. PatternLab is user-friendly, simple, and provides a graphical user interface. Copyright © 2010 John Wiley & Sons, Inc.

关键词： label-based proteomic analysis label-free proteomic analysis shotgun proteomics

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Accelerating the Shuffled Frog Leaping algorithm by parallel implementations in FPGAs

Accelerating the Shuffled Frog Leaping algorithm by parallel...

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2010 IEEE 5th International Conference on Bio-Inspired Computing: Theories and Applications, BIC-TA 2010

作者： Muñoz, Daniel M. Llanos, Carlos H. Dos S. Coelho, Leandro Ayala-Rincón, Mauricio Department of Mechanical Engineering Automation and Control Group/GRACG University of Brasilia Brasilia D.F. Brazil Industrial and Systems Engineering Graduate Program Pontifical Catholic University of Parana Curitiba Parana Brazil Department of Computer Science and Mathematics University of Brasilia Brasilia D.F. Brazil

ISBN: (纸本)9781424464388

Meta-heuristics are efficient techniques for solving large scale optimization problems in which traditional mathematical techniques are impractical or provide sub-optimal solutions. The Shuffled Frog Leaping algorithm (SFLA) is a stochastic iterative method, bio-inspired on the memetic evolution of a group of frogs when seeking for food, which combines the social behavior-based of the particle swarm optimization technique (PSO) and the global information exchange of memetic algorithms. However, the SFLA algorithm suffers on large execution times, being this problem clearly evident when solving complex optimization problems for embedded applications. This drawback can be overcome by exploiting the parallel capabilities of the SFLA. This paper proposes a hardware parallel implementation of the SFLA algorithm (HPSFLA) using FPGAs (Field programmable gate Arrays) and the efficient floating-point arithmetic. The proposed architecture allows the SFLA to improve the functionality of the algorithm as well as to decrease the execution times by implementing parallel frogs and parallel memeplexes. Three well-known benchmark problems have been used to validate the implemented algorithm and simulation results demonstrate that the HPSFLA speeds-up by factors of 362, 727 and 211 a C-code implementation using an embedded microprocessor for the Sphere, Rastrigin and Rosenbrock benchmarks problems, respectively. Synthesis, simulation and execution time results demonstrate the effectiveness of the proposed HPSFLA architecture for embedded optimization systems. © 2010 IEEE.

关键词： Global optimization

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Comparison between two FPGA implementations of the particle swarm optimization algorithm for high-performance embedded applications

Comparison between two FPGA implementations of the particle ...

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2010 IEEE 5th International Conference on Bio-Inspired Computing: Theories and Applications, BIC-TA 2010

作者： Muñoz, Daniel M. Llanos, Carlos H. Dos S. Coelho, Leandro Ayala-Rincón, Mauricio Department of Mechanical Engineering Automation and Control Group/GRACO University of Brasilia Brasilia D.F. Brazil Industrial and Systems Engineering Graduate Program LAS/PPGPES Pontifical Catholic University of Parana Curitiba Parana Brazil Department of Computer Science and Mathematics University of Brasilia Brasilia D.F. Brazil

ISBN: (纸本)9781424464388

Particle Swarm Optimization (PSO) algorithms have been proposed to solve engineering problems that require to find an optimal point of operation. There are several embedded applications which requires to solve online optimization problems with a high performance. However, the PSO suffers on large execution times, and this fact becomes evident when using Reduced Instruction Set computer (RISC) microprocessors in which the operational frequencies are low in comparison with the high operational frequencies of traditional personal computers (PCs). This paper compares two hardware implementations of the parallel PSO algorithm using an efficient floating-point arithmetic which perform computations with large dynamic range and high precision. The full-parallel and the partially-parallel PSO architectures allow the parallel capabilities of the PSO to be exploited in order to decrease the running time. Three well-known benchmark test functions have been used to validate the hardware architectures and a comparison in terms of cost in logic area, quality of the solution and performance is reported. In addition, a comparison of the execution time between the hardware and two C-code software implementations, based on a Intel Core Duo at 1.6GHz and a embedded Microblaze microprocessor at 50MHz, are presented. © 2010 IEEE.

关键词： Global optimization

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