Quantum Key Distribution (QKD) is a secure communication method that uses quantum mechanics to exchange secret keys. Currently, the QKD process uses a static error correction method, which can lead to inaccuracies and...
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A software package that allows one to carry out multiple alignment of protein and nucleic acid sequences of almost unlimited length and number of sequences is developed on C-DAC parallel computer-a transputer-based ma...
This work describes the development of Assamese online numeral recognition system using Hidden Markov Models (HMM) and Support Vector Machines (SVM). Preprocessed (x, y) coordinates and their first and second derivati...
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Artificial intelligence is getting shrewd in real time with massive amounts of computational power and high in demand in last quarter more than billion dollars. The Intensification of Neural Networks in Machine learni...
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kNN is a fundamental query in various location based services such as POI recommendation and ride planning. There is an increasing demand to scale such services by querying over a data federation, where the entire dat...
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Brain-Computer Interface (BCI) systems are the leading technology in the world related to Neurosciences. Human intelligence and imagination have no bounds and this has led to vast advancement in BCI systems related to...
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Scheduling is very important and essential process for the State Load Dispatch centers to generate various schedules like entitlements, declared capability, injection and drawl schedules etc. for disciplined managemen...
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ISBN:
(纸本)9781509001293
Scheduling is very important and essential process for the State Load Dispatch centers to generate various schedules like entitlements, declared capability, injection and drawl schedules etc. for disciplined management of power. Scheduling system is required for state load dispatch centers (SLDC) and their state-sector generating stations, distributed companies/beneficiaries throughout the clock because schedules can change regularly with an hour in advance. Scheduling system should provide its continuous service in the event of the failure of any of its components. So to achieve fault tolerance for scheduling system, the clustering and load balancing approach is used.
The authors propose the design of a library environment, called PARUL (PARallel User Library), for distributed memory multiprocessor systems. An important feature of the environment is that it allows the data distribu...
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The authors propose the design of a library environment, called PARUL (PARallel User Library), for distributed memory multiprocessor systems. An important feature of the environment is that it allows the data distributed for use of a library function as well as the results generated by the function to be retained in the network of processors to be used by subsequent library functions. The user of the library is given full control over the set of variables that are retained in the network. The authors describe the implementation details of PARUL on a multi-transputer system (PARAM) and discuss its performance.< >
The parallel implementation of the revised simplex algorithm (RSA) using eta-factorization holds the promise of significant improvement in the execution time by virtue of the existence of a high degree of parallelism ...
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The parallel implementation of the revised simplex algorithm (RSA) using eta-factorization holds the promise of significant improvement in the execution time by virtue of the existence of a high degree of parallelism in the computation within an iteration of the algorithm. However, the scheme employed to partition key data structures in a distributed memory parallel processor has a great impact on the achievable performance. The paper explores the trade-offs between block-row and block-column partitioning schemes for the matrix of constraint coefficients vis-a-vis the communication overheads and granularity of parallel computations. The results of an approximate analysis of the compute-communication balance are compared with measurements from practical implementation of the partitioning schemes on C-DAC's PARAM 8000 distributed memory parallel processor.< >
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