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25th International Conference on Parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Zomaya, Albert Y. School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW Australia

ISBN: (纸本)9789819642069

Graphics Processing Units (GPUs) are widely used as powerful hardware accelerators for data-intensive tasks. However, their efficacy can be hindered by constraints in device memory and data transfer speeds via the PCI-E link. This paper explores the use of GPUs for executing scalable sorting operations that exceeds the GPU’s global memory by a factor of at least two orders of magnitude. To address this challenge, we leverage the power of NVIDIA’s asynchronous CUDA streams. Our solution enhances GPU performance by implementing a pipeline model to offload sorting operations from the Solid-State Drive (SSD) to GPU memory via the host’s main memory. This strategy maximizes the multiway concurrency level to reduce the overhead associated with data transfer within the GPU memory hierarchy. We perform extensive performance evaluations by sorting 128 billion data elements initially stored on an external NVMe SSD. The results confirm the effectiveness of our approach, showcasing a speed-up of 4.3× compared to the results for CPU-based out-of-memory sorting of skewed data based on Intel’s Threading Building Blocks (TBB) sorting algorithm. Our results include the cost of transfer times to and from the main memory, a factor often overlooked in similar studies. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Graphics processing unit

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I/O Latency Management in Private Cloud Infrastructures 25th

I/O Latency Management in Private Cloud Infrastructures

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25th International Conference on Parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Zomaya, Albert Y. School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW Australia

ISBN: (纸本)9789819642069

This paper examines how co-locating multiple VMs on a single physical server with shared storage impacts I/O performance, specifically focusing on latency of I/O operations, and the overall throughput. We introduce a Proportional-Integral-Derivative (PID) controller to maintain I/O latency close to a predefined target by dynamically adjusting I/O requests based on real-time measurements. Through a series of experiments, we evaluated the effectiveness of our PID controller in comparison to VMware’s default QoS mechanism within a private cloud environment. The results indicate that the PID controller significantly enhances performance for latency-critical workloads, achieving substantially higher compliance with latency targets compared to the default mechanism. However, this prioritization of high-priority VMs comes at the expense of increased latency and reduced throughput for lower-priority workloads during periods of I/O contention. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Three term control systems

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Containerized Data-Flow Processing for Scalable Real-Time Analytics on Edge Devices 25th

Containerized Data-Flow Processing for Scalable Real-Time A...

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25th International Conference on Parallel and distributed computing, Applications and Technologies, PDCAT 2024

作者： HoseinyFarahabady, MohammadReza Y. Zomaya, Albert School of Computer Science Center for Distributed and High Performance Computing The University of Sydney SydneyNSW2006 Australia

ISBN: (纸本)9789819642069

The increasing demand for real-time data analysis in Internet of Things (IoT) ecosystems has created several challenges, particularly in environments where resources are limited, and minimizing data processing latency is critical. This paper investigates the use of Linux Containerization (LXC) as a lightweight, resource-efficient alternative to traditional virtual machine managers for accelerating data-flow processing applications. We propose an architecture that integrates Linux Containerization (LXC) with a Proportional-Integral-Derivative (PID) controller to dynamically manage I/O resource allocation, ensuring Quality of Service (QoS) for I/O-intensive data analytics workloads. The proposed PID controller continuously monitors system performance and dynamically adjusts I/O resource allocation to mitigate performance degradation. Through a series of experiments, we demonstrate that LXC-based solutions outperform traditional methods in managing I/O-intensive data analytics workloads in IoT and edge ecosystems. © The Author(s), under exclusive license to Springer Nature Singapore Pte Ltd. 2025.

关键词： Quality of service

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A resource allocation controller for key-value data stores 16

A resource allocation controller for key-value data stores

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16th IEEE International Symposium on Network computing and Applications, NCA 2017

作者： Kim, Young Ki Reza Hoseiny, F.M. Lee, Young Choon Zomaya, Albert Y. University of Sydney Center for Distributed and High Performance Computing School of IT Australia Department of Computing Macquarie University Sydney Australia

ISBN: (纸本)9781538614655

Recent distributed key-value data stores, such as Aerospike are getting the momentum with ever-increasing need for large-scale real-time data processing. While these data stores can provide significantly improved performance, they still struggle to meet Quality of Service (QoS) during workload surges. In this paper, we address the problem of QoS-aware resource allocation for burst workloads in key-value data stores. To this end, we design a resource allocation controller, which enables each application to independently regulate the releases of its requests taking into account QoS. In particular, the proposed controller monitors the actual performance metrics of the target system and dynamically releases requests from a buffer owned by each application accordingly. We have implemented the proposed controller in an Aerospike cluster for our performance evaluation. Experiments have been conducted with various workload intensities (with up to 36,180 write operations per second) in comparison with the default Aerospike policy. Experimental results confirm that the proposed controller decreases the overall average latency up to 41% on high-rate workload while maintaining the QoS of high priority applications. © 2017 IEEE.

关键词： Resource allocation

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Geo-distributed Analytical Streaming Architecture for IoT Platforms

Geo-Distributed Analytical Streaming Architecture for IoT Pl...

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2024 IEEE International Conference on Cluster computing, CLUSTER 2024

作者： Hoseiny Farahabady, M. Reza Zomaya, Albert Y. The University of Sydney School of Computer Science Center for Distributed and High Performance Computing SydneyNSW2006 Australia

ISBN: (纸本)9798350358711

The surge in real-time IoT data introduces scalability and computational challenges, necessitating advanced architectural and technological solutions. Streamed data processing is increasingly adopted across industries to enhance operational efficiency by extracting insights from vast, unstructured datasets. However, complex analytical tasks, such as multi-join queries, often require stateful iterative calculations on high-volume, high-velocity data, which challenges conventional programming models like MapReduce. This paper introduces an architectural model enabling application developers to create intricate streaming computational logic within an IoT platform. Our architecture supports scalable applications across distributed edge-tier nodes, particularly for iterative analytical operations on streamed data. We discuss core concepts and a timestamp model (borrowed from the timely data-flow concept) attached to data items circulating between computational blocks, which can execute concurrently on different edge-tier nodes. Additionally, we detail a buffer management mechanism that dynamically adjusts memory size in each computational block on nodes with limited capacity. This mechanism considers application performance requirements and runtime conditions to optimize buffer sizes. performance evaluation against cloud-tier alternatives confirms the effectiveness of our solution. Experimental results show a significant reduction in p-99 delay compared to cloud-tier deployment with a database engine for analytical applications involving multi-join operations. © 2024 IEEE.

关键词： MapReduce

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Certificate-free user-friendly HPC access with UNICORE

Certificate-free user-friendly HPC access with UNICORE

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UNICORE Summit 2014

作者： Grunzke, Richard Müller-Pfefferkorn, Ralph Center for Information Services and High Performance Computing Department of Distributed and Data Intensive Computing Technische Universität Dresden Dresden Germany

ISBN: (纸本)9783958060043

UNICORE as a middleware to uniformly access computing resources is currently hampered in its daily use by its requirement of using personal certificates. For users these are inconvenient and complex to handle. The latest major release of UNICORE enables its certificate-free deployment using Unity as translating service for external authentication sources such as LDAP. The paper describes the background, the approach taken, experiences and gives an outlook. © UNICORE Summit 2014 - Proceedings. All rights reserved.

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On using pattern matching algorithms in MapReduce applications

On using pattern matching algorithms in MapReduce applicatio...

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9th IEEE International Symposium on Parallel and distributed Processing with Applications, ISPA 2011

作者： Rizvandi, Nikzad Babaii Taheri, Javid Zomaya, Albert Y. Center for Distributed and High Performance Computing School of Information Technologies University of Sydney Australia Australian Technology Park Sydney NSW 1430 Australia

ISBN: (纸本)9780769544281

In this paper, we study CPU utilization time patterns of several MapReduce applications. After extracting running patterns of several applications, they are saved in a reference database to be later used to tweak system parameters to efficiently execute unknown applications in future. To achieve this goal, CPU utilization patterns of new applications are compared with the already known ones in the reference database to find/predict their most probable execution patterns. Because of different patterns lengths, the Dynamic Time Warping (DTW) is utilized for such comparison;a correlation analysis is then applied to DTWs' outcomes to produce feasible similarity patterns. Three real applications (WordCount, Exim Mainlog parsing and Terasort) are used to evaluate our hypothesis in tweaking system parameters in executing similar applications. Results were very promising and showed effectiveness of our approach on pseudo-distributed MapReduce platforms. © 2011 IEEE.

关键词： MapReduce

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Untrusted Hardware Causes Double-Fetch Problems in the I/O Memory

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Journal of Computer Science & Technology 2018年第3期33卷 587-602页

作者： Kai Lu Peng-Fei Wang Gen Li Xu Zhou College of Computer National University of Defense Technology Changsha 410073 China Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China Collaborative Innovation Center of High-Performance Computing National University of Defense Technology Changsha 410073 China

The double fetch problem occurs when the data is maliciously changed between two kernel reads of the supposedly same data, which can cause serious security problems in the kernel. Previous research focused on the double fetches between the kernel and user applications. In this paper, we present the first dedicated study of the double fetch problem between the kernel and peripheral devices （aka. the hardware double fetch）. Operating systems communicate with peripheral devices by reading from and writing to the device mapped I/O （input and output） memory. Owing to the lack of effective validation of the attached hardware, compromised hardware could flip the data between two reads of the same I/O memory address, causing a double fetch problem. We propose a static pattern-matching approach to identify the hardware double fetches from the Linux kernel. Our approach can analyze the entire kernel without relying on the corresponding hardware. The results are categorized and each category is analyzed using case studies to discuss the possibility of causing bugs. We also find four previously unknown double-fetch vulnerabilities, which have been confirmed and fixed after reporting them to the maintainers.

关键词： hardware double fetch double-fetch bug I/O memory peripheral device double-fetch vulnerability

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Leveraging the Compute Power of Two HPC Systems for higher-Dimensional Grid-Based Simulations with the Widely-distributed Sparse Grid Combination Technique 23

Leveraging the Compute Power of Two HPC Systems for Higher-D...

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2023 International Conference for high performance computing, Networking, Storage and Analysis, SC 2023

作者： Pollinger, Theresa Van Craen, Alexander Niethammer, Christoph Breyer, Marcel Pflüger, Dirk Institute for Parallel and Distributed Systems Universität Stuttgart Stuttgart Germany High Performance Computing Center Universität Stuttgart Stuttgart Germany

ISBN: (纸本)9798400701092

Grid-based simulations of hot fusion plasmas are often severely limited by computational and memory resources;the grids live in four- to six-dimensional space and thus suffer the curse of dimensionality. However, high resolutions are required to fully capture the physics of interest. The sparse grid combination technique is a multi-scale method in which many anisotropically coarse resolved grids are used to approximate a fine-scale solution - -and it alleviates the curse of *** paper presents the core concepts of the widely-distributed combination technique, which allows us to use the compute power and memory of more than one HPC system for the same simulation. We apply the sparse grid combination technique to a six-dimensional advection problem serving as a proxy for plasma simulations. The full-grid solution approximated by the combination technique would contain ≈ 5 ZB if computed with conventional grid-based methods. Even the combination technique simulation operates on ≈ 1 × 1011 double-precision degrees of freedom, or 988 GB, plus the supporting sparse grid data structures. We propose a new approach to divide the compute load between the two HPC systems, requiring only 76 GB to be exchanged. Based on this, we have realized the first synchronous combination technique simulation using two HPC systems, in our case the two German Tier-0 supercomputers HAWK and SuperMUC-NG. On two systems, the simulation can be computed at an average overhead of ≈ 35 % (108 s per combination step) for file I/O and transfer. The presented concepts apply to any pair of HPC systems if high-speed data transfer is possible. © 2023 ACM.

关键词： Supercomputers

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DFTracker: detecting double-fetch bugs by multi-taint parallel tracking

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Frontiers of Computer Science 2019年第2期13卷 247-263页

作者： Pengfei WANG Kai LU Gen LI Xu ZHOU Science and Technology on Parallel and Distributed Processing Laboratory National University of Defense Technology Changsha 410073 China College of Computer National University of Defense Technology Changsha 410073 China Collaborative Innovation Center of High Performance Computing National University of Defense Technology Changsha 410073 China

A race condition is a common trigger for concurrency bugs. As a special case, a race condition can also occur across the kernel and user space causing a doublefetch bug, which is a field that has received little research attention. In our work, we first analyzed real-world doublefetch bug cases and extracted two specific patterns for doublefetch bugs. Based on these patter ns, we proposed an approach of multi-taint parallel tracking to detect double-fetch bugs. We also implemented a prototype called DFTracker (doublefetch bug tracker), and we evaluated it with our test suite. Our experiments demonstrated that it could effectively find all the double-fetch bugs in the test suite including eight realworld cases with no false negatives and minor false positives. In addition, we tested it on Linux kernel and found a new double-fetch bug. The execution overhead is approximately 2x for single-file cases and approximately 9x for the whole kernel test, which is acceptable. To the best of the authors1 knowledge, this work is the first to introduce multi-taint parallel tracking to double-fetch bug detection—an innovative method that is specific to double-fetch bug features—and has better path coverage as well as lower runtime overhead than the widely used dynamic approaches.

关键词： multi-taint parallel tracking double fetch race condition between kernel and user time of check to time of use real-world case analysis Clang Static Analyzer

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