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IEEE Southeastcon

作者： S.K. Das C.C.-Y. Chen Center of Research in Parallel and Distributed Computing Department of Computer Science University of North Texas Denton TX USA

The authors present cost-optimal parallel algorithms for depth-order (e.g., pre-, in-, and post-order) and level-order (e.g., breadth-first and breadth-depth) traversals of general trees with n nodes. Each of the algo... 详细信息

关键词： parallel algorithms Phase change random access memory Computer science Binary trees distributed computing Classification tree analysis Algorithm design and analysis

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A cost-optimal parallel algorithm for the parentheses matching problem on an EREW PRAM

A cost-optimal parallel algorithm for the parentheses matchi...

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International Symposium on parallel Processing

作者： C.C.-Y. Chen S.K. Das Center for Research in Parallel and Distributed Computing Department of Computer Sciences University of North Texas Denton TX USA

The article presents a cost-optimal parallel algorithm for the parentheses matching problem on the EREW PRAM model. For n parentheses, the algorithm requires O(n/p+log n) time and O(n+p log p) space, employing p proce... 详细信息

关键词： parallel algorithms Phase change random access memory Data structures distributed computing Concurrent computing Arithmetic Binary trees Partitioning algorithms Read-write memory Algorithm design and analysis

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Performance of parallel spanning tree algorithms on linear arrays of transputers and Unix systems

Performance of parallel spanning tree algorithms on linear a...

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International Symposium on parallel Processing

作者： S.K. Das Cui-Qing Yang Center for Research in Parallel and Distributed Computing Department of Computer Sciences University of North Texas Denton TX USA

This paper presents empirical performance of parallel algorithms for computing a spanning tree (SPT) and a minimum spanning tree (MST) of connected graphs on the Transputer and Unix systems, where processors are configured as a one-dimensional array. The parallel MST algorithm uses a weight matrix data structure; and three implementations of the SPT algorithm are presented with unordered edge-list, linked adjacency list and adjacency matrix as data structures. The experiments are conducted with a wide range of random graphs, generated for various edge-densities (d) for a given number (n) of vertices. The edge-density is varied between 0.1 and 0.9, and the maximum number of vertices (or edges) considered are 300 (or 40000) and 500 (or 110000) for transputer and Unix systems, respectively. A maximum speed-up of 2.98 is achieved on the transputer network of eight processors, and that for the Unix system is 3.0 with four processors.< >

关键词： Tree graphs Concurrent computing distributed computing parallel algorithms Tree data structures Data structures Random number generation Communication networks Clocks Very large scale integration

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Some fast parallel algorithms for parentheses matching 3rd

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3rd International Conference on computing and Information, ICCI 1991

作者： Das, Sajal K. Chen, Calvin C.-Y. Lewis, Gene Prasad, Sushil Center for Research in Parallel and Distributed Computing Department of Computer Science University of North Texas P.O. Box 13886 DentonTX76203-3886 United States Department of Mathematics and Computer Science Georgia State University AtlantaGA30303 United States

ISBN: (纸本)9783540540298

The parentheses matching problem is to determine the mate of each parenthesis in a balanced string of n parentheses. In this paper, we present three novel and elegant parallel algorithms for this problem on parallel random-access machine (PRAM) models. Each of our algorithms has polylog-time complexity and two of them are cost-optimal. © Springer-Verlag Berlin Heidelberg 1991.

关键词： parallel algorithms

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A parallel circuit-partitioned algorithm for timing driven cell placement

A parallel circuit-partitioned algorithm for timing driven c...

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IEEE International Conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： J.A. Chandy P. Banerjee Sierra Vista Research Inc. Los Gatos CA USA Center for Parallel and Distributed Computing Northwestern University Evanston IL USA

Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing based placement has minimized area, but with deep submicron design, minimizing wirelength delay is also needed. The algorithm discussed in this paper is the first parallel algorithm for timing driven placement. We have used a very accurate Elmore delay model which is more complete intensive and hence the need for parallel placement is more apparent. parallel placement is also needed for very large circuits that may not fit in the memory of a single processor. Therefore, our algorithm is circuit partitioned and can handle arbitrary large circuits on distributed memory multiprocessors. The algorithm, called mpi PLACE, has been tested on several large benchmarks on a variety of parallel architectures.

关键词： Timing Computational modeling Circuit simulation Simulated annealing Delay Partitioning algorithms Very large scale integration parallel algorithms Circuit testing Benchmark testing

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A dynamic load balancing strategy for channel assignment using selective borrowing in cellular mobile environment 96

A dynamic load balancing strategy for channel assignment usi...

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Proceedings of the 2nd annual international conference on Mobile computing and networking

作者： Sajal K. Das Sanjoy K. Sen Rajeev Jayaram Center for Research in Parallel and Distributed Computing Department of Computer Sciences University of North Texas P.O. Box 13886 Denton TX

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KC-GenRe: A Knowledge-constrained Generative Re-ranking Method Based on Large Language Models for Knowledge Graph Completion

arXiv

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arXiv 2024年

作者： Wang, Yilin Hu, Minghao Huang, Zhen Li, Dongsheng Yang, Dong Lu, Xicheng Defense Innovation Institute Academy of Military Sciences China Information Research Center of Military Science China National Key Laboratory of Parallel and Distributed Computing China

The goal of knowledge graph completion (KGC) is to predict missing facts among entities. Previous methods for KGC re-ranking are mostly built on non-generative language models to obtain the probability of each candidate. Recently, generative large language models (LLMs) have shown outstanding performance on several tasks such as information extraction and dialog systems. Leveraging them for KGC re-ranking is beneficial for leveraging the extensive pre-trained knowledge and powerful generative capabilities. However, it may encounter new problems when accomplishing the task, namely mismatch, misordering and omission. To this end, we introduce KC-GenRe, a knowledge-constrained generative re-ranking method based on LLMs for KGC. To overcome the mismatch issue, we formulate the KGC re-ranking task as a candidate identifier sorting generation problem implemented by generative LLMs. To tackle the misordering issue, we develop a knowledge-guided interactive training method that enhances the identification and ranking of candidates. To address the omission issue, we design a knowledge-augmented constrained inference method that enables contextual prompting and controlled generation, so as to obtain valid rankings. Experimental results show that KG-GenRe achieves state-of-the-art performance on four datasets, with gains of up to 6.7% and 7.7% in the MRR and Hits@1 metric compared to previous methods, and 9.0% and 11.1% compared to that without re-ranking. Extensive analysis demonstrates the effectiveness of components in KG-GenRe. Copyright © 2024, The Authors. All rights reserved.

关键词： Knowledge graph

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Efficient parallel Algorithms for Pattern Recognition

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parallel Algorithms and Applications 1994年第1-2期2卷 81-98页

作者： Das, Sajal K Fisher, Paul S Zhang, Hua Center for Research in Parallel and Distributed Computing Department of Computer Science University of North Texas Denton TX 76203-6886 United States

Finitely inductive (F1) sequences are a class of sequences, finite or infinite, which are amenable to a certain mathematical representation which has direct significance to pattern recognition and string matching. Pattern recognition using the Fl technique first transforms known patterns into function table(s) by factoring, and then uses the function table(s) to match an input pattern by following. Factoring is done off line and only once for each pattern. The sequential time for matching two sequences depends only upon the length of the input sequence. In this paper, we propose cost-optimal (i.e., efficient) parallel algorithms for FI sequence processing. These algorithms include parallel factoring and following by bucket packing on an exclusive-read and exclusive-write (EREW), parallel random access machine (PRAM) model. The proposed algorithms also have implications lo parallel integer sorting. © 1994, Taylor & Francis Group, LLC. All rights reserved.

关键词： Finitely inductive sequences Integer sorting parallel algorithms Pattern recognition String matching

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parallel global routing algorithms for standard cells

Parallel global routing algorithms for standard cells

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International Symposium on parallel Processing

作者： Z. Xing J. Chandy P. Banerjee Computer and Systems Research Laboratory University of Illinois Urbana IL USA Cadence Design Systems Chelmsford MA USA Center for Parallel and Distributed Computing Northwestern University Evanston IL USA

In this paper, we propose three different parallel algorithms based on a state-of-the-art global router called TimberWolfSC. The parallel algorithms have been implemented by using the Message Passing Interface (MPI), and have been evaluated on a wide range of parallel platforms such as the Sun Sparccenter 1000 and the Intel Paragon. Our experimental results show good speedups and qualities from two of these parallel algorithms. We have been able to reduce runtimes of some circuits from half an hour to 5 minutes, obtained speedups of about 4.0 to 5.0 on 8 processors, with less than 2-3% degradation of quality of the solutions.

关键词： Routing parallel algorithms distributed computing Message passing Pins Wire Contracts Concurrent computing Laboratories Sun

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EDDNet: An Efficient and Accurate Defect Detection Network for the Industrial Edge Environment

EDDNet: An Efficient and Accurate Defect Detection Network f...

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IEEE International Conference on Software Quality, Reliability and Security (QRS)

作者： Runbing Qin Ningjiang Chen Yihui Huang School of Computer and Electronic Information Guangxi University Nanning China Guangxi Intelligent Digital Services Research Center of Engineering Technology Nanning China Guangxi Colleges and Universities Key Laboratory of Parallel and Distributed Computing Nanning China

Defect detection aims to locate the accurate position of defects in images, which is of great significance to quality inspection in the industrial product manufacturing. Currently, many defect detection methods rely on deep neural networks to extract features. Although the accuracy of these methods is relatively high, it is computationally intensive, making the methods difficult to deploy in resource-limited edge devices. In order to solve these problems, a lightweight defect detection model for the industrial edge environment is proposed, termed the efficient defect detection network (EDDNet). EfficientNet-B0 is used as the feature extraction backbone, extracting feature maps from feature layers of different depths of the network and fusing multilevel features by multilevel feature fusion (MFF). To obtain more information, we redesign the attention mechanism in MBConv blocks, taking the encoding space (ES) attention mechanism as a new module, which solves the problem that the defective image spatial information is ignored. The experimental results on the NEU-DET and DAGM2007 datasets and PCB defect datasets demonstrate the effectiveness of the proposed EDDNet and its possibility for application in industrial edge device.

关键词： Image edge detection Computational modeling Neural networks Software quality Object detection Feature extraction Transformers

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