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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2004年 3332卷 455-462页

作者： Yang, Chao-Tung Wang, Ko-Tzu Li, Kuan-Ching Lee, Liang-Teh High Performance Computing Laboratory Dept. of Computer Science and Information Engineering Tunghai University Taichung 407 Taiwan Parallel and Distributed Processing Center Dept. of Computer Science and Information Management Providence University Taichung 433 Taiwan Dept. of Computer Science and Engineering Tatung University Taipei 104 Taiwan

In this research paper, we integrate and implement high-Availability (HA) and Load-Balancing technologies to clusters of workstations, increasing both the availability and scalability of services and resources in these systems. The cluster of workstations is commonly built and used as web-based VOD servers. Thus, this paper presents the hardware and software configurations of cluster systems working as VOD servers. © Springer-Verlag Berlin Heidelberg 2004.

关键词： Linux

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On design of cluster and grid computing environment toolkit for bioinformatics applications

Lecture Notes in Computer Science (including subseries Lectu...

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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2004年 3326卷 82-87页

作者： Yang, Chao-Tung Kuo, Yu-Lun Li, Kuan-Ching Gaudiot, Jean-Luc High Performance Computing Laboratory Dept. of Computer Science and Information Engineering Tunghai University Taichung 40744 Taiwan Parallel and Distributed Processing Center Dept. of Computer Science and Information Management Providence University Taichung 43301 Taiwan Parallel and Scalable Computer Architecture Laboratory Dept. of Electrical Engineering and Computer Science University of California - Irvine Irvine CA 92697 United States

In this paper, we present BioGrid, a novel computing resource that combines advantages of grid computing technology with bioinformatics parallel applications. The grid environment permits the sharing of a large amount of idle computing resources and data. The investigation of bioinformatics demands orders of magnitude of computing resources and in parallel, the biological data are growing in such a high speed. By using BioGrid, we plan to integrate and share resources and biological data using the grid computing technology. Still in this paper, the well-known FASTA application is performed as matter of testing and analysis in our grid computing platform, as goal to show the improved efficiency and reduced computation time. © Springer-Verlag Berlin Heidelberg 2004.

关键词： Bioinformatics

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On Implementation of a scalable wallet-size cluster computing system for multimedia applications

Lecture Notes in Computer Science (including subseries Lectu...

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Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) 2004年 3333卷 697-704页

作者： Lee, Liang-Teh Li, Kuan-Ching Yang, Chao-Tung Tseng, Chia-Ying Liu, Kang-Yuan Hung, Chih- Dept. of Computer Science and Engineering Tatung University Taipei 104 Taiwan Parallel and Distributed Processing Center Dept. of Computer Science and Information Management Providence University Taichung 433 Taiwan High Performance Computing Laboratory Dept. of Computer Science and Information Engineering Tunghai University Taichung 407 Taiwan Networks and Multimedia Institute Institute for Information Industry Taipei 106 Taiwan

In order to obtain a low-cost, low-power consumption and small sized digital home processing center, especially for multimedia applications, we propose a scalable wallet-size cluster computing system in this paper. Such system uses low-cost, low-power consumption and small sized microprocessors as computing nodes to form a cluster system. The main reason why we are interested to investigate and build such system is to increase the computing power and to accelerate the H.264 video processing. We analyzed the H.264 decoder scheme and distributed the most heavy-load computations in the decoder scheme to each computing node (or microprocessor) of the cluster system for the processing of signals, in parallel. To run multimedia applications in this cluster system, an efficient real-time video processing is implemented. © Springer-Verlag 2004.

关键词： computing power

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A software design model for parallel applications on heterogeneous systems

A software design model for parallel applications on heterog...

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International Symposium on Parallel and distributed Processing (IPDPS)

作者： M. Dwivedula S. Hariri M. Parashar High Performance Distributed Computing (HPDC) Laboratory Department of Electrical and Computer Engineering University of Arizona Tucson Tucson AZ USA The Applied Software Sytems Laboratory (TASSL) Department of Electrical and Computer Engineering Caip Center-Rutgers University Piscataway NJ USA

Overlap of computations and communications is an effective mechanism to improve the performance of parallel/distributed applications significantly. This overlap can be achieved efficiently by using data partitioning and properly scheduling the data transfer. Various asynchronous communication primitives, that are provided by most message passing tools (e.g. PVM, MPI), can be used to implement the required. Here, we present a design model, the distributed Software Design Model (DSDM) and show how it can be applied to optimize parallel/distributed applications. We show through several examples, the Master-Slave Merge Sorting Application and the astrophysical N-Body Problem, how the DSDM can be used to develop efficient and optimized implementations of parallel and distributed algorithms.

关键词： Software design Application software distributed computing Concurrent computing Message passing Processor scheduling Hardware Laboratories Asynchronous communication Design optimization

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Reusable software components for performability tools, and their utilization for web-based configurable tools 10th

Reusable software components for performability tools, and t...

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10th International Conference on Modelling Techniques and Tools for Computer performance Evaluation, Tools 1998

作者： Van Moorsel, Aad P. A. Huang, Yiqing Distributed Software Research Department Bell Laboratories Research Lucent Technologies 600 Mountain Ave Murray HillNJ07974 United States Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois at Urbana-Champaign 1308 W. Main St UrbanaIL61801 United States

ISBN: (纸本)3540649492

This paper discusses software reusability strategies for performance and reliability modeling tools. Special emphasis is on web-embedded tools, and the potential interaction between such tools. We present the system analysis tools (SAT) application programming interface, which allows for quickly embedding existing tools in the web, and generally simplifies programming analysis tools by structured reuse. We also introduce the FREUD project, which has as primary aim to establish a single point of access to a variety of web-enabled tools. In addition, FREUD facilitates configurable web tools by allowing a user to select from the registered modeling formalisms, solvers and graphics tools, and by providing glue between the tools through scripting. We will argue that this form of reuse is particularly suitable for performability modeling tools because of their predictable usage pattern. © Springer-Verlag Berlin Heidelberg 1998.

关键词： Computer software reusability

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Parallel algorithms for simultaneous scheduling, binding and floorplanning in high-level synthesis

Parallel algorithms for simultaneous scheduling, binding and...

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IEEE International Symposium on Circuits and Systems (ISCAS)

作者： P. Prabhakaran P. Banerjee Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana-Champaign IL USA Center for Parallel and Distributed Computing Department of Electrical and Computer Engineering Northwestern University Evanston IL USA

With small device features in submicron technologies, interconnection delays play a dominant part in cycle time. Hence, it is important to consider the impact of physical design during high level synthesis. In comparison to a traditional approach which separates high-level synthesis from physical design, an algorithm which is able to make these stages interact very closely, would result in solutions with lower latency and area. However, such an approach could result in increased runtimes. Parallel processing is an attractive way of reducing the runtimes. In this paper, two parallel algorithms for simultaneous scheduling, binding and floorplanning algorithm are presented. A detailed hardware model is considered, taking into account multiplexor and register areas and delays. Experimental results are reported on an IBM SP-2 multicomputer, with close to linear speedups for a set of benchmark circuits.

关键词： Parallel algorithms high level synthesis Runtime Integrated circuit interconnections Delay effects Algorithm design and analysis Parallel processing Scheduling algorithm Hardware Registers

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Asynchronous parallel algorithms for test set partitioned fault simulation 97

Asynchronous parallel algorithms for test set partitioned fa...

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Proceedings of the eleventh workshop on Parallel and distributed simulation

作者： Dilip Krishnaswamy Prithviraj Banerjee Elizabeth M. Rudnick Janak H. Patel Center for Reliable and High-Performance Computing University of IIlinois UrbanaIL Center for Parallel and Distributed Computing Northwestern University Evanston IL

ISBN: (纸本)9780818679650

We propose two new asynchronous parallel algorithms for test set partitioned fault simulation. The algorithms are based on a new two-stage approach to parallelizing fault simulation for sequential VLSI circuits in which the test set is partitioned among the available processors. These algorithms provide the same result as the previous synchronous two stage approach. However, due to the dynamic characteristics of these algorithms and due to the fact that there is very minimal redundant work, they run faster than the previous synchronous approach. A theoretical analysis comparing the various algorithms is also given to provide an insight into these algorithms. The implementations were done in MPI and are therefore portable to many parallel platforms. Results are shown for a shared memory multiprocessor.

关键词： asynchronous parallel algorithms test set partitioned fault simulation circuit analysis computing software portability dynamic characteristics redundant work MPI sequential VLSI circuits Message Passing Interface synchronous two stage approach shared memory multiprocessor circuit CAD

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Asynchronous parallel algorithms for test set partitioned fault simulation

Asynchronous parallel algorithms for test set partitioned fa...

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Workshop on Principles of Advanced and distributed Simulation (PADS)

作者： D. Krishnaswamy P. Banerjee E.M. Rudnick J.H. Patel Center for Reliable and High Performance Computing University of Illinois Urbana IL USA Center for Parallel and Distributed Computing Northwestern University Evanston IL USA

关键词： Parallel algorithms Circuit faults Circuit simulation Partitioning algorithms Circuit testing Computational modeling Sequential circuits Semiconductor device testing distributed computing Algorithm design and analysis

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SPITFIRE: scalable parallel algorithms for test set partitioned fault simulation

SPITFIRE: scalable parallel algorithms for test set partitio...

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VLSI Test Symposium

作者： D. Krishnaswamy E.M. Rudnick J.H. Patel P. Banerjee Center for Reliable and High Performance Computing University of Illinois Urbana-Champaign IL USA Center for Parallel and Distributed Computing Northwestern University Evanston IL USA

We propose three synchronous parallel algorithms for scalable parallel test set partitioned fault simulation. The algorithms are based on a new two-stage approach to parallelizing fault simulation for sequential VLSI circuits in which the test set is partitioned among the available processors, The test set partitioning inherent in the algorithms overcomes the good circuit logic simulation bottleneck that exists in traditional fault partitioned approaches to parallel fault simulation. The implementations were done on a shared memory multiprocessor and on a network of workstations. Two of the algorithms show a small degree of pessimism in a few cases, with respect to the fault coverage as compared with a uniprocessor run, while the third algorithm provides the same results as in a uniprocessor run. All algorithms provide excellent speedups and perform much better than a traditional fault partitioned approach, on both shared and distributed memory parallel platforms.

关键词： Parallel algorithms Circuit testing Circuit faults Partitioning algorithms Circuit simulation Logic testing Sequential analysis Very large scale integration Sequential circuits Workstations

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Parallel algorithms for force directed scheduling of flattened and hierarchical signal flow graphs

Parallel algorithms for force directed scheduling of flatten...

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IEEE International Conference on Computer Design: VLSI in Computers and Processors, (ICCD)

作者： P. Prabhakaran P. Banerjee Center for Reliable and High-Performance Computing Coordinated Science Laboratory University of Illinois Urbana IL USA Center for Parallel and Distributed Computing Department of Electrical and Computer Engineering Northwestern University Evanston IL USA

In this paper we present some novel algorithms for scheduling hierarchical signal flow graphs in the domain of high-level synthesis. There are several key contributions of this paper. First, we develop a novel extension of the force directed scheduling problem which naturally handles loops and conditionals by coming up with a scheme of scheduling hierarchical signal flow graphs. Second, we develop three new parallel algorithms for the scheduling problem. Third, our parallel algorithms are portable across a wide range of parallel platforms. We report results on a set of high-level synthesis benchmarks on 8-processor SGI Challenge and a network of 4 SUN SPARCstation5 work stations. Finally, while some parallel algorithms for VLSI CAD reported by earlier researchers have reported a loss of qualities of results, our parallel algorithms produce exactly the same results as the sequential algorithms on which they are based.

关键词： Parallel algorithms Flow graphs Processor scheduling Concurrent computing Scheduling algorithm Contracts Cost function Broadcasting

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