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Average optimal branch-and-bound algorithm on distributed memory systems 4

Average optimal branch-and-bound algorithm on distributed me...

引用

4th International Conference/Exhibition on high performance computing in the Asia-Pacific Region, HPC-Asia 2000

作者： Wu, Jigang Zhang, Xianchao Xie, Xing Chen, Guoliang Computer Department Yantai University Yantai264005 China Computer Department University of Science and Technology of China Hefei230027 China National High Performance Computing Center Hefei230027 China

ISBN: (纸本)0769505902

In this paper, a new data structure called string-queue is proposed in order to implement more efficiently the selection rule and the elimination rule of the general branch-and-bound algorithm. A new general parallel branch-and-bound algorithm on a distributed memory multiprocessor system is also presented. Its communication complexity in single iteration is down to its lower bound O(p) on a 2D mesh network. Both theoretical analysis and experimental results show that its average computational complexity is nearly in its lower bound. © 2000 IEEE.

关键词： Iterative methods

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Diagnostic testing of embedded memories using BIST

Diagnostic testing of embedded memories using BIST

引用

Design, Automation and Test in Europe Conference and Exhibition 2000, DATE 2000

作者： Bergfeld, Timothy J. Niggemeyer, Dirk Rudnick, Elizabeth M. Center for Reliable and High-Performance Computing University of Illinois 1308 West Main Street Urbana IL 61801 United States Laboratory for Information Technology University of Hannover Schneiderberg 32 30167 Hannover Germany

The increasing use of large embedded memories in systems-on-chips requires automatic memory reconfiguration to avoid the need for external accessibility. In this work, effective diagnostic memory tests of linear order O(N) are proposed that enable memory reconfiguration, and their diagnostic capabilities are analyzed. In particular, these tests allow single-cell faults to be distinguished from multiple-cell faults, such as coupling faults. In contrast to conventional O(N) tests, all cells involved in a fault are detected and localized, which allows complete reconfiguration using minimal-area BIST hardware that compares favorably with other BIST designs. © 2000 IEEE.

关键词： System-on-chip

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A practical scheduling algorithm for input-buffered switch

A practical scheduling algorithm for input-buffered switch

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International Conference on Communication technology (ICCT)

作者： Zhang Lisheng Han Chengdu Center of High Perfofmance Computing Chinese Academy of Sciences Institute for Computing Technology Beijing China Institute of Computing Technology Chinese Academy of Sciences Beijing CN

Input-buffering is preferentially used in high-speed commercial and experimental routers and switches. The cell scheduling algorithms are critical components in input-buffered switches. They have a significant impact on the throughput, stability and guaranteed quality of service (QoS) of input-buffered switches. The longest queue first (LQF) algorithm can achieve 100% throughput for input-buffered switches, but is not starvation-free. That is, there are some queues will never be serviced. This paper proposes a modified LQF algorithm called mLQF. It can achieve 100% throughput and is starvation-free.

关键词： Scheduling algorithm Switches Throughput Fabrics Packet switching Bandwidth Read-write memory Computers Stability Aggregates

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Impact of stirrers' position on the properties of a reverberation chamber with two stirrers

Impact of stirrers' position on the properties of a reverber...

引用

IEEE International Symposium on Electromagnetic Compatibility (EMC)

作者： Daming Zhang Jianjian Song Electromagnetic compatibility division Institute of High Performance Computing Singapore Department of Electrical & Computer Engineering Rose Hulman Institute of Technology IN USA

In the design of a reverberation chamber, configurations and constructions of the stirrers play a significant role. Different structures and locations of the stirrers will result in a different working volume and influence the uniformity of the chamber. In this paper a chamber with two stirrers is simulated. Locations of the stirrers are adjusted to improve isotropy, random-polarization and homogeneity characteristics of the chamber.

关键词： Reverberation chamber Sampling methods Test facilities Costs Anechoic chambers Electromagnetic compatibility high performance computing Polarization Immunity testing Manufacturing

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A new approach for computing the discrete Fourier transform of arbitrary length

A new approach for computing the discrete Fourier transform ...

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International Conference on Signal Processing Proceedings (ICSP)

作者： Zhang Xianchao Huang Liusheng Chen Guoliang National High Performance Computing Center at Hefei Department Computer Sci & Tech University of Science and Technology of China Hefei China

A new approach for computing DFT of arbitrary length is proposed, which is based on the arithmetic Fourier transform (AFT). The algorithm needs only /spl Oscr/(N) multiplications and has a simple computational structure, so it can be easily performed in parallel and it is very suitable for VLSI design. The algorithm is faster than the classical FFT when the length of the DFT contains relatively large factors. It is especially efficient for computing the DFT of prime length, where FFT does not work. The algorithm is competitive with the FFT in term of accuracy. A method to enhance the accuracy of the algorithm is also proposed for cases when higher accuracy is required.

关键词： Discrete Fourier transforms Signal processing algorithms Arithmetic Discrete transforms Fourier transforms Very large scale integration high performance computing Concurrent computing Algorithm design and analysis Electrostatic precipitators

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Parallel computation for three-dimensional multi-stage turbomachinery flow simulation on PC cluster environment

Parallel computation for three-dimensional multi-stage turbo...

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International Conference on high performance computing in the Asia-Pacific Region

作者： Lung-Cheng Lee Cherng-Yeu Shen Shih-Hsiung Chen National Center of High-performance Computing Hsinchu Taiwan Institute of Aeronautics and stronautics National Cheng Kung University Tainan Taiwan

ISBN: (纸本)0769505892

The three-dimensional multi-stage turbomachinery flow simulation is calculated on the PC cluster environment in NCHC. The UTRC large-scale turbine is employed here as the baseline configuration. A compressible viscous finite volume algorithm solving Reynolds averaged Navier-Stokes equations with artificial dissipation terms similar to Jameson's method is adopted circumferential average is performed between the interface of rotor and stator. The master/slave algorithm is employed for the parallel implementation, and a processor calculates a blade row. Three, five, seven and nine blade rows are used to demonstrate the performance of parallel computation on the PC cluster. Those results are shown that the performance is very well, especially for more blade rows, i.e., nine blade rows, have the super speedup efficiency.

关键词： Concurrent computing Blades Clustering algorithms Turbomachinery Computational modeling Large-scale systems Turbines Navier-Stokes equations Stators Master-slave

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Diagnostic testing of embedded memories using BIST

Diagnostic testing of embedded memories using BIST

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Design, Automation and Test in Europe Conference and Exhibition

作者： T.J. Bergfeld D. Niggemeyer E.M. Rudnick Laboratory for Information Technology University of Hanover Hanover Germany Center for Reliable and High-Performance Computing University of Illinois Urbana IL USA

关键词： Built-in self-test Circuit faults Fault detection Random access memory Automatic testing System-on-a-chip Hardware Information technology Microprocessors Very large scale integration

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Research to the application of parallelism MM4 in Dawn-1000 in Jianghuai basin

Research to the application of parallelism MM4 in Dawn-1000 ...

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International Conference on high performance computing in the Asia-Pacific Region

作者： Li Bai Zhou Kun An Hong Meteorological Observatory of Anhui Province Hefei China National High Performance Computing Center CS. Department University of Science and Technology Hefei China

ISBN: (纸本)0769505892

This article analyzes and studies the numerical forecast result of PMD vs. reality of heavy rain in the Jianghuai basin in 1998 and 1999. It proves that PMD can better simulate the mesoscale weather system of the Jianghuai basin such as the Jianghuai cyclone and heavy rain on the Mei-yu front etc., and the mesoscale rain-band within the systems with a 6-24 hour period of validity.

关键词： Parallel processing Weather forecasting Rain Economic forecasting high performance computing Analytical models Predictive models Numerical models Independent component analysis Cyclones

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Optimal record and replay for debugging of nondeterministic MPI/PVM programs

Optimal record and replay for debugging of nondeterministic ...

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International Conference on high performance computing in the Asia-Pacific Region

作者： Qilong Zheng Guoliang Cheng Liusheng Huang National High Performance Computing Center at Hefei Department of Computer Science and Technology University of Science and Technology Hefei Anhui China University of Science and Technology of China Hefei Anhui CN

ISBN: (纸本)0769505892

The record-and-replay technique proved to be an effective solution to the cyclic debugging of nondeterministic parallel programs. Because of its nondeterminism, a parallel program given the same inputs on successive runs can sometimes produce different results. In this paper, an optimal record-and-replay technique is presented which produces less overhead in time and space by using the "non-overtaking rule" provided by MPI and PVM.

关键词： Debugging Concurrent computing Computer science Computer bugs Message passing Libraries Asynchronous communication Delay

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Diagnostic testing of embedded memories based on output tracing

Diagnostic testing of embedded memories based on output trac...

引用

IEEE International Workshop on Memory technology, Design and Testing

作者： D. Niggemeyer M. Redeker E.M. Rudnick Center for Reliable and High-Performance Computing University of Illinois Urbana-Champaign Urbana-Champaign IL USA Laboratory for Information Technology University of Hannover Hanover Germany

A new approach to diagnostic testing of embedded memories is presented which enables the design of tests that provide complete detection and distinguishing of all faults in a given fault model. The approach is based on decomposition of functional memory faults into basic fault effects and output tracing. Output tracing involves storing all read operation results for defective memory cells and replaces the commonly used evaluation of a "fail" signal. In particular, we examine memory tests of linear order (O(N)), since this class of tests requires low test application times and is realizable as built-in self-test circuitry with very low area overhead.

关键词： Circuit faults Circuit testing Automatic testing Fault detection System testing Built-in self-test System-on-a-chip performance evaluation Embedded computing Information technology

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