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arXiv 2025年

作者： Gu, Jianfeng Wang, Hao Guo, Xiaorang Schulz, Martin Gerndt, Michael Chair of Computer Architecture and Parallel Systems Technical University of Munich Munich Germany

As FPGAs gain popularity for on-demand application acceleration in data center computing, dynamic partial reconfiguration (DPR) has become an effective fine-grained sharing technique for FPGA multiplexing. However, current FPGA sharing encounters partial reconfiguration contention and task execution blocking problems introduced by the DPR, which significantly degrade application performance. In this paper, we propose VersaSlot, an efficient spatio-temporal FPGA sharing system with novel *** slot architecture that can effectively resolve the contention and task blocking while improving resource utilization. For the heterogeneous *** architecture, we introduce an efficient slot allocation and scheduling algorithm, along with a seamless cross-board switching and live migration mechanism, to maximize FPGA multiplexing across the cluster. We evaluate the VersaSlot system on an FPGA cluster composed of the latest Xilinx UltraScale+ FPGAs (ZCU216) and compare its performance against four existing scheduling algorithms. The results demonstrate that VersaSlot achieves up to 13.66x lower average response time than the traditional temporal FPGA multiplexing, and up to 2.19x average response time improvement over the state-of-the-art spatio-temporal sharing systems. Furthermore, VersaSlot enhances the LUT and FF resource utilization by 35% and 29% on average, respectively. Copyright © 2025, The Authors. All rights reserved.

关键词： Scheduling algorithms

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KLiNQ: Knowledge Distillation-Assisted Lightweight Neural Network for Qubit Readout on FPGA

arXiv

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arXiv 2025年

作者： Guo, Xiaorang Bunarjyan, Tigran Liu, Dai Lienhard, Benjamin Schulz, Martin Chair of Computer Architecture and Parallel Systems Technical University of Munich Garching Germany Department of Chemistry Princeton University PrincetonNJ08544 United States Department of Electrical and Computer Engineering Princeton University PrincetonNJ08544 United States

Superconducting qubits are among the most promising candidates for building quantum information processors. Yet, they are often limited by slow and error-prone qubit readout—a critical factor in achieving high-fidelity operations. While current methods, including deep neural networks, enhance readout accuracy, they typically lack support for mid-circuit measurements essential for quantum error correction, and they usually rely on large, resource-intensive network models. This paper presents KLiNQ, a novel qubit readout architecture leveraging lightweight neural networks optimized via knowledge distillation. Our approach achieves around a 99% reduction in model size compared to the baseline while maintaining a qubit-state discrimination accuracy of 91%. KLiNQ facilitates rapid, independent qubit-state readouts that enable mid-circuit measurements by assigning a dedicated, compact neural network for each qubit. Implemented on the Xilinx UltraScale+ FPGA, our design can perform the discrimination within 32 ns. The results demonstrate that compressed neural networks can maintain high-fidelity independent readout while enabling efficient hardware implementation, advancing practical quantum computing. Copyright © 2025, The Authors. All rights reserved.

关键词： Field programmable gate arrays (FPGA)

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Plausibility in Early Stages of Architectural Design: A New Tool for High-Rise Residential Buildings

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Tsinghua Science and Technology 2009年第3期14卷 327-332页

作者： Dirk Donath Danny Lobos Chair of Computer Science in Architecture Faculty of Architecture Bauhaus-UniversityWeimar 99423 Germany

This paper analyzes the problem of the design of envelopes for high-rise isolated residential buildings. The phenomenon of envelope creation appears in the early stages of the architectural design. Variables that influence the final shape and size of such envelopes are then identified. This paper presents the state-of-the-art tools for the current solutions at the commercial and academic/scientific level. The variables identified in this research are the client＇s needs, the urban code and architectural practice, and their specific components for the final creation of a new decision support system tool based on the building information modeling （BIM） software platform, to facilitate the work in the project development and drawing production stages. This tool generates several options for building envelopes according to the parameters required by the city Zoning Planning Commission. These options then lead to deliver reliable data and a geometry that can be analyzed in a timely fashion by the engineers, builders, architects, government, and clients in the early stages of the building＇s design. The results show that use of specific information and communication technologies （ICT） tools in the early stages of a building design helps reduce the working time, increases confidence in the generated solution, and contributes to the exploration of alternatives in a short period of time.

关键词： constraint based design parametric programming urban modeling optimization architectural design

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A SystemC Based Framework for Cycle Accurate Processor Simulation and Parameter Analysis

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IFAC-PapersOnLine 2016年第25期49卷 92-97页

作者： Kohl, Johannes Reichenbach, Marc Demel, Carsten Fey, Dietmar Department of Computer Science Chair of Computer Architecture Friedrich-Alexander-University Erlangen-Nuremberg Germany

The development of new domain specific microprocessors architectures is a very complex task. Hardware designers are confronted with several hundred design parameters (e.g. cache size, ALU operation, etc.) which can be combined in a nearly arbitrary way to develop new architectures. Often these parameters are guessed by the designer or best practice is used to find an apparently good parameter set. The utilization of virtual hardware can be one solution to solve this problem. Different parameter sets can be evaluated inside a simulation environment, without the need for designing any real hardware. Unfortunately, most virtual hardware simulators are either to inflexible or not accurate enough to get valuable results. Therefore, this paper presents a SystemC based framework, which enables the construction of highly parameterizable virtual hardware processor models, directed at parameter analysis. The structure and working principle of two exemplary processors are showcasing the use of this framework. A presentation of how different parameter sets impact the programs execution time and power consumption of the processor will be given, as a result of the virtual hardwares execution. © 2016

关键词： Integrated circuit design Application programs Hardware Simulators Cycle accurate Design space exploration Design tool Emulators Microprocessor based control

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Leveraging Hybrid Classical-Quantum Methods for Efficient Load Rebalancing in HPC 24

Leveraging Hybrid Classical-Quantum Methods for Efficient Lo...

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Proceedings of the SC '24 Workshops of the International Conference on High Performance Computing, Network, Storage, and Analysis

作者： Justyna Zawalska Minh Chung Katarzyna Rycerz Laura Schulz Martin Schulz Dieter Kranzlmüller AGH University of Krakow Institute of Computer Science Krakow Poland and Academic Computer Center CYFRONET AGH Krakow Poland Leibniz Supercomputing Centre (LRZ) Garching bei München Germany and MNM-Team Ludwig-Maximilians-Universität München (LMU) Germany Leibniz Supercomputing Centre (LRZ) Garching bei München Germany Leibniz Supercomputing Centre (LRZ) Garching bei München Germany and Chair for Computer Architecture and Parallel Systems Technical University of Munich (TUM) Germany

ISBN: (纸本)9798350355543

Load imbalance is a challenge for parallel applications in High Performance Computing (HPC). It is caused by processes having different execution times or load values, leading to idle or wait times at synchronization points, where faster processes must wait for the slowest process to catch up. To mitigate this issue, applications can employ load balancing (LB) strategies, which migrate load between processes to even out load. This is often referred to as the Load Rebalancing Problem (LRP). While many approaches solving the LRP exist, they can only be heuristics and hence further optimization potential exists. In our work, we turn to a novel approach by using hybrid classical-quantum approaches and present two versions of the constrained quadratic model for solving the LRP; the two differ in how they balance the number of qubits required with the types of applied constraints. We compare the quantum-based methods with classical methods using heuristic algorithms Greedy, Karmarkar--Karp, and ProactLB. We evaluate our approaches using imbalance ratio and speedup as metrics, as well as the number of migrated tasks to indicate overhead caused by migrations. Our results show that the quantum-based methods outperform the classic methods. For example, we need only 1/4 of the number of migrated tasks in a realistic use case compared with classical methods, particularly Greedy and KK, to balance the load.

关键词： CQM

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Emergency landing field identification based on a hierarchical ensemble transfer learning model 8

Emergency landing field identification based on a hierarchic...

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8th International Symposium on Computing and Networking, CANDAR 2020

作者： Klos, Andreas Rosenbaum, Marius Schiffmann, Wolfram Chair of computer architecture FernUniversität in Hagen Hagen Germany

ISBN: (纸本)9781728182216

The full loss of thrust of an aircraft requires fast and reliable decisions of the pilot. If no published landing field is within reach, an emergency landing field must be selected. The choice of a suitable emergency landing field denotes a crucial task to avoid unnecessary damage of the aircraft, risk for the civil population as well as the crew and all passengers on board. Especially in case of instrument meteorological conditions it is indispensable to use a database of suitable emergency landing fields. Thus, based on public available digital orthographic photos and digital surface models, we created various datasets with different sample sizes to facilitate training and testing of neural networks. Each dataset consists of a set of data layers. The best compositions of these data layers as well as the best performing transfer learning models are selected. The hyperparameters of the chosen models for each sample size are optimized with Bayesian and Bandit optimization. The models outputs were investigated with respect to the input data by the utilization of layer-wise relevance propagation. With optimized models we created an ensemble model to improve the segmentation performance. Finally, an area around the airport of Arnsberg in North Rhine-Westphalia was segmented into 26.252 km2 as landable and 221.329 km2 as not suitable for an emergency landing. In sum 54,997 emergency landing fields are identified and stored in a database. The verification of the final approach’s obstacle clearance is left unconsidered. © 2020 IEEE

关键词： Learning systems

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A Versatile High Frequency Electricity Monitoring Framework for Our Future Connected Home 1

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1st EAI International Conference on Sustainable Energy for Smart Cities, SESC 2019

作者： Völker, Benjamin Pfeifer, Marc Scholl, Philipp M. Becker, Bernd Chair for Computer Architecture University of Freiburg Freiburg im Breisgau Germany

ISBN: (数字)9783030456948

ISBN: (纸本)9783030456931

In our homes a lot of devices are powered by electricity without us knowing the specific amount. As electricity production has a large, negative environmental impact, we should be more aware about how devices consume power and how we can adapt our daily routine to decrease our electricity requirements. Methods such as Non-Intrusive Load Monitoring (NILM) can provide the user with precise device level electricity data by measuring at a single point in a houses’ electricity network. However, the time resolution of most off-the-shelf power meters is not sufficient for NILM or the meters are locked down for security reasons. Therefore, we have developed our own versatile energy metering framework which consists of a high frequency electricity metering device, a versatile backend for data processing and a webapp for data visualization. The developed hardware is capable of sampling up to 32 kHz, while the software framework allows to extract other power related metrics such as harmonic content. The system’s application ranges from providing transparent electricity usage to the user up to generating load forecasts with fine granularity. © 2020, ICST Institute for computer Sciences, Social Informatics and Telecommunications Engineering.

关键词： Data visualization

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Selecting Resource-Efficient ML Models for Transport Mode Detection on Mobile Devices

Selecting Resource-Efficient ML Models for Transport Mode De...

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2022 IEEE International Conference on Internet of Things and Intelligence Systems, IoTaIS 2022

作者： Matthes, Philipp Springer, Thomas Institute of Systems Architecture Chair of Computer Networks Tu Dresden Germany

ISBN: (数字)9798350396454

ISBN: (纸本)9798350396454

Processing data closer to the source to minimize latency and the amount of data to be transmitted is a major driver for research on the Internet of Things (IoT). Since data processing in many IoT scenarios heavily depends on machine learning (ML), designing ML models for resource constraint devices at the edge of IoT infrastructures is one of the big challenges. Which ML model performs best highly depends on the problem domain but also on the availability of resources. Thus, to find an appropriate ML model in the broad search space of options, the trade-off between accuracy and resource consumption in terms of memory, CPU, and energy needs to be considered. However, there are ML problems where most current research focuses on accuracy, and the resource consumption of applicable models is not well investigated yet. We show that transport mode detection (TMD) is such a problem and present a case study for designing an ML model running on smartphones. To transform the search for the needle in the haystack into a structured design process, we propose an engineering workflow to systematically evolve ML model candidates, considering portability and resource consumption in addition to model accuracy. At the example of the Sussex-Huawei-Locomotion (SHL) dataset, we apply this process to multiple ML architectures and find a suitable model that convinces with high accuracy and low measured resource consumption for smartphone deployment. We discuss lessons learned, enabling engineers and researchers to use our workflow as a blueprint to identify solutions for their ML problems systematically. © 2022 IEEE.

关键词： Internet of things

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Delivering guidance information in heterogeneous systems 23

Delivering guidance information in heterogeneous systems

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23th International Conference on architecture of Computing Systems 2010, ARCS 2010

作者： Nowak, Fabian Kicherer, Mario Buchty, Rainer Karl, Wolfgang Chair for Computer Architecture Karlsruhe Institute of Technology Karlsruhe76128 Germany

ISBN: (纸本)9783800732227

With the advent of reconfigurable platforms and GPUs, we need means to successfully support the programmer and the system scheduler in efficiently exploiting the resources of the system. We present an approach of how the programmer can annotate the code so that a hardware abstraction layer can choose which resource to use for a given function call in a user-transparent manner. We evaluate the introduced toolchain and the time required to obtain these code annotations. © 2010 23th International Conference on architecture of Computing Systems 2010, ARCS 2010 - Workshop Proceedings. All rights reserved.

关键词： Abstracting

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Extending a light-weight runtime system by dynamic instrumentation for performance evaluation 23

Extending a light-weight runtime system by dynamic instrumen...

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23th International Conference on architecture of Computing Systems 2010, ARCS 2010

作者： Kicherer, Mario Nowak, Fabian Buchty, Rainer Karl, Wolfgang Karlsruhe Institute of Technology Chair for Computer Architecture Karlsruhe76128 Germany

ISBN: (纸本)9783800732227

Increasing complexity of current and future systems poses a new challenge for software engineers. In a previous work we presented a light-weight runtime system for abstraction of heterogeneous parallel systems. This runtime system adapts an application to the current system state in order to improve the utilization of the available resources. For online evaluation of such adaptions, we propose a versatile instrumentation mechanism that can be used by the runtime system. We show that this technique introduces only minor overhead and we compare it to the Dyninst mechanism. © 2010 23th International Conference on architecture of Computing Systems 2010, ARCS 2010 - Workshop Proceedings. All rights reserved.

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