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Smart sensor architectures for embedded biosignal analysis

Smart sensor architectures for embedded biosignal analysis

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Conference on Design and architectures for Signal and Image Processing

作者： Benjamin Pfundt Marc Reichenbach Björn Eskofier Dietmar Fey Department Computer Science Chair of Computer Architecture Department Computer Science Pattern Recognition Lab Friedrich-Alexander-University Erlangen-Nuremberg Germany

In many sports and medical applications small and wearable sensors are used that capture motion and physiological signals. Yet, commonly such sensor are only capable of acquiring raw data, which is afterwards transmitted to a smartphone or other mobile computing device where processing and classification is carried out. This results in limited usability because another device has to be worn. Moreover, high power consumption due to continuous transmission is a main disadvantage. Therefore, we propose a smart sensor approach that can alleviate these problems by carrying out the processing on the sensor itself. To house the processing schemes in the sensor node we developed a new computer architecture utilizing an FPGA and an ASIC. To show the benefits of the in-sensor processing, we chose two representative biosensor applications: a movement and fall detection system for the elderly and a swimming style recognition system for professional athletes. Compared to conventional approaches the same classification rate can be achieved while saving space, power, weight and setup costs.

关键词： computer architecture Accelerometers Feature extraction Intelligent sensors Monitoring Legged locomotion Pattern recognition

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Heterogeneous computer architectures: An image processing pipeline for optical metrology

Heterogeneous computer architectures: An image processing pi...

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International Conference on Reconfigurable Computing and FPGAs (ReConFig)

作者： Marc Reichenbach Ralf Seidler Dietmar Fey Department Computer Science Chair of Computer Architecture Friedrich-Alexander-Universität Erlangen-Nürnberg Germany

Industrial image processing tasks, especially in the domain of optical metrology, are becoming more and more complex. While in the recent years standard PC components were sufficient to fulfill the requirements, special architectures have to be used to build up high speed image processing systems today. For example for adaptive optical systems in large scale telescopes, the latency between capturing an image and steering the mirrors is critical for the quality of the resulting images. Commonly, the applied image processing algorithms consist of several tasks with different granularities and complexities. Therefore, we combined the advantages of multicore CPUs, GPUs, and FPGAs to build up a heterogeneous image processing pipeline for adaptive optical systems. Each used architecture is well-suited to solve a particular task efficiently. With the developed pipeline it is possible to achieve a high throughput and to reduce the latency of the whole steering system significantly.

关键词： Field programmable gate arrays computer architecture Image reconstruction Optical imaging Pipelines Adaptive optics

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A Generic VHDL Template for 2D Stencil Code Applications on FPGAs

A Generic VHDL Template for 2D Stencil Code Applications on ...

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IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW)

作者： Michael Schmidt Marc Reichenbach Dietmar Fey Department Computer Science Chair of Computer Architecture Friedrich-Alexander-Universitat Erlangen-Nuremberg Erlangen-Nuremberg Germany

The efficient realization of self-organizing systems based on 2D stencil code applications, like our developed Marching Pixel algorithms, is a great challenge. They are data-intensive and also computational-intensive, because often a high number of iterations is required. FPGAs are predestined for the realization of these algorithms. They are very flexible, allow a scalable parallel processing and have a moderate power consumption, even in high-performance versions. Therefore, FPGAs are highly qualified to make these applications also real-time capable. Our goal was to implement an efficient parameterizable buffering and parallel processing scheme for such operations in FPGAs, to process them as fast as possible. We developed a generic VHDL template which allows a scalable parallelization and pipelining of 2D stencil code applications in relation to application and hardware constraints.

关键词： computer architecture Microprocessors Field programmable gate arrays Pipeline processing Clocks Bandwidth Real time systems

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Situation Recognition for Service Management Systems Using OWL 2 Reasoners

Situation Recognition for Service Management Systems Using O...

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IEEE Workshop on Context Modeling and Reasoning

作者： Waltenegus Dargie Eldora Julian Mendez Christoph Mobius Kateryna Rybina Veronika Thost Anni-Yasmin Turhan Chair of Computer Networks Institute of Systems Architecture Technische Universitat Dresden Chair for Automata Theory Institute for Theoretical Computer Science Technische Universitat Dresden

ISBN: (纸本)9781467350754

For service management systems the early recognition of situations that necessitate a rebinding or a migration of services is an important task. To describe these situations on differing levels of detail and to allow their recognition even if only incomplete information is available, we employ the ontology language OWL 2 and the reasoning services defined for it. In this paper we provide a case study on the performance of state of the art OWL 2 reasoning systems for answering class queries and conjunctive queries modeling the relevant situations for service rebinding or migration in the differing OWL 2 profiles.

关键词： OWL Servers Ontologies Cognition Runtime Hardware Power demand

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The AllScale Runtime Interface — Theoretical Foundation and Concept

The AllScale Runtime Interface — Theoretical Foundation and...

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Workshop on Many-Task Computing on Grids and Supercomputers, MTAGS

作者： Arne Hendricks Thomas Heller Herbert Jordan Peter Thoman Thomas Fahringer Dietmar Fey Chair of Computer Science 3 Computer Architecture Friedrich Alexander University Erlangen Erlangen Germany Institute of Computer Science University of Innsbruck Innsbruck Austria

ISBN: (纸本)9781509052134

Extreme scale HPC systems are expected to reach exascale performance around the year 2020. While it is widely known that theses systems pose new challenges regarding energy efficiency of architectures, concurrency and resiliency, they also challenge developers of applications trying to efficiently utilizing resources: Managing parallel control flows, hardware resources and dependencies is a complex and labor-intensive endeavor. We present here the concept of a runtime interface for the AllScale environment, a novel and sophisticated approach to the decoupling of specification of parallelism from underlying management activities during runtime. AllScale itself utilizes a parallel programming model based on nested recursive parallelism as foundation to add compiler and runtime based techniques to harness performance gains of modern architectures. Automated Porting to extreme scale architectures, flexible tuning and hardware management are only among the things that will be additionally added. One core component of the system will consequently be the runtime with its interface to the other components. In this paper we will present our concept of a runtime interface, based on a theoretical foundation influenced by the tuple-space paradigm. The tuple-space will be augmented by asynchronous computation together with fine grained synchronization based on futures resembling the recursive control flow adding both decomposability as well as set-like behavior to the notion of a tuple.

关键词： Runtime Parallel processing computer architecture Hardware Synchronization Tuning Electronics packaging

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QoS-Aware Service Composition: A Survey

QoS-Aware Service Composition: A Survey

引用

European Conference on Web Services (ECOWS)

作者： Anja Strunk Department of Computer Science Institute of Systems Architecture Chair of Computer Networks Technische Universität Dresden Dresden Germany

Service compositions build new services by orchestrating a set of existing services. In the Internet of Services there may be many functional similar services, but with different Quality of Service (QoS). Thus a significant research problem in service compositions is how to select the composition's composite services that the overall QoS of the composition is being maximized. This paper summarizes, classifies and evaluates major research efforts in this area and gives an overview about further open research questions.

关键词： Quality of service Time factors Optimization Availability Classification algorithms Concurrent computing

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Nano-technology aware investigations on fault-masking techniques in the presence of high fault probabilities

Nano-technology aware investigations on fault-masking techni...

引用

International Conference on High Performance Computing & Simulation (HPCS)

作者： Matthias Sand Volkmar Sieh Dietmar Fey Chair of Computer Science 3 (Computer Architecture) Friedrich-Alexander-Universität Erlangen-Nümberg Erlangen Germany

Nano-architectures are promising alternatives for current CMOS technology, which is facing serious challenges for further down-scaling. However, high failure rates - compared to the conventional CMOS process - lead to multiple faults during lifetime operation of nano-architectures. In this paper, we investigate the outcome of traditional fault-masking techniques in the presence of high fault probabilities. Redundant codes and circuit structures are evaluated in a generic way, using stochastic methods. The original goal was to provide a means to decide, under which conditions, which fault-masking techniques are worthwhile. Our results, however, suggest, that these techniques require extremely low fault rates and/or cause extraordinarily high additional cost.

关键词： Circuit faults Decoding Wires Logic gates Tunneling magnetoresistance Equations Fault tolerance

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Automated Federation of Distributed Resources into User-Controlled Cloud Environments

Automated Federation of Distributed Resources into User-Cont...

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IEEE International Conference on Utility and Cloud Computing (UCC)

作者： Marc Mosch Hartmut Schweizer Stephan Gross Alexander Schill Department of Computer Science Institute of Systems Architecture Chair of Computer Networks Technische Universität Dresden Dresden Germany

Virtualization and broadband Internet connections enabled what is known today under the term cloud. Benefits like scalability and cost reduction by pay per use agreements are accompanied by potential harm to the users data. Since existing cloud solutions can be considered synonymous with unknown locations and potentially hostile environments security protection objectives can not be guaranteed. Motivated by cloud's potential we propose a way to get rid of this drawback. We present work in progress of an approach that enables users to benefit from cloud computing and retain data sovereignty by federating the users own resources. More precisely we present initial protocol design thoughts for this federation and an extension of the OCCI specification for the flexible description of own and foreign services.

关键词： Cloud computing Availability Protocols Encryption

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An annotation tool for enhancing the user interface generation process for services

An annotation tool for enhancing the user interface generati...

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International Crimean Conference on Microwave & Telecommunication Technology

作者： Paoli Izquierdo Jordan Janeiro Gerald Hubsch Thomas Springer Alexander Schill Department of Computer Science Institute of System Architecture Chair of Computer Networks Dresden University of Technology Dresden Sachsen-Anhalt Germany

The user interface generation process is still a complex issue. The manual creation process is time consuming and complex because it requires the combination of the application developer work and the user interface designer work. Therefore, many approaches investigate the automatic user interface generation. However, currently such approaches are not able to take usability aspects into account, due to the lack of information for such a process. Thus, we propose a tool which intends to ease and enhance the automatic user interface generation process for services by introducing service annotations that are attached to services and provide additional information for the process of automatic user interface generation.

关键词： User interfaces Web services Data mining Inference mechanisms Graphical user interfaces computer science computer architecture computer networks Electronic mail Application software

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Dynamic re-encoding during MDD minimization

Dynamic re-encoding during MDD minimization

引用

International Symposium on Multiple-Valued Logic

作者： F. Schmiedle W. Gunther R. Drechsler Institute of Computer Science Chair of Computer Architecture Albert Ludwig University Freiburg im Breisgau Germany Institute of Computer ScienceChair of Computer Architecture Albert Ludwig University Freiburg im Breisgau Germany

Multi-valued decision diagrams (MDDs) are a generalization of binary decision diagrams (BDDs). They often allow efficient representation of functions with multi-valued input variables similar to BDDs in the binary case. Therefore they are suitable for several applications in synthesis and verification of integrated circuits. MDD sizes counted in number of nodes vary from linear to exponential dependent on the variable ordering used. In all these applications, minimization of MDDs is crucial. In many cases, multi-valued variables are composed by a certain number of binary variables, and so the multi-valued inputs arise by grouping binary variables. The selection of these groups, that is, the decision which variables to merge, has enormous impact on MDD sizes. Techniques for finding variable groupings before starting MDD minimization have been proposed recently. In this paper we present a new method that uses re-encoding, i.e. dynamic variable grouping. We don't choose one fixed variable grouping before minimizing MDDs, but allow to change the binary variables to be considered together during the minimization process. This is possible since MDDs are simulated on top of BDDs. By this, the underlying binary variables remain accessible throughout the minimization process. This technique is described in detail and we also show experimental results that demonstrate the efficiency of our approach.

关键词： Data structures Boolean functions Minimization Input variables Integrated circuit synthesis computer science computer architecture Application specific integrated circuits Encoding Logic design

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