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A Survey on Graph Processing Accelerators:Challenges and Opportunities

Journal of Computer Science & technology 2019年第2期34卷 339-371页

作者： Chuang-Yi Gui Long Zheng Bingsheng He Cheng Liu Xin-Yu Chen Xiao-Fei Liao Hai Jin National Engineering Research Center for Big Data Technology and System School of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 China Services Computing Technology and System Laboratory School of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 China Cluster and Grid Computing Laboratory School of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 China School of Computing National University of Singapore Singapore 117418 Singapore Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China

Graph is a well known data structure to represent the associated relationships in a variety of applications,e.g.,data science and machine *** a wealth of existing efforts on developing graph processing systems for improving the performance and/or energy efficiency on traditional architectures,dedicated hardware solutions,also referred to as graph processing accelerators,are essential and emerging to provide the benefits significantly beyond what those pure software solutions can *** this paper,we conduct a systematical survey regarding the design and implementation of graph processing ***,we review the relevant techniques in three core components toward a graph processing accelerator:preprocessing,parallel graph computation,and runtime *** also examine the benchmarks and results in existing studies for evaluating a graph processing ***,we find that there is not an absolute winner for all three aspects in graph acceleration due to the diverse characteristics of graph processing and the complexity of hardware *** finally present and discuss several challenges in details,and further explore the opportunities for the future research.

关键词： graph processing accelerator domain-specific architecture performance energy efficiency

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VMckpt:lightweight and live virtual machine checkpointing

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Science china(Information Sciences) 2012年第12期55卷 2865-2880页

作者： LIU HaiKun 1,JIN Hai 1,LIAO XiaoFei 1,MA Bo 1 & XU ChengZhong 2 1 services computing technology and system lab,cluster and grid computing lab,School of Computer Science and technology,Huazhong University of Science and technology,Wuhan 430074,china 2 Department of Electrical and Computer Engineering,Wayne State University,Detroit,MI 48202,USA 1. Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan 430074 China2. Department of Electrical and Computer Engineering Wayne State University Detroit MI [48202 USA

Recent advance of virtualization technology provides a new approach to check-point/restart at the virtual machine(VM) *** contrast to traditional process-level checkpointing,checkpointing at the virtualization layer brings up several advantages,such as compatibility,transparence,flexibility and ***,because the virtualization layer has little semantic knowledge about the operation system and the applications running atop,VM-layer checkpointing requires saving the entire operating system state rather than a single *** overhead may render the approach *** reduce the size of VM checkpoint,in this paper we propose a page eviction scheme and an incremental checkpointing mechanism to avoid saving unnecessary VM pages in the *** keep the system online transparently,we propose a live checkpointing mechanism by saving the memory image in a copy-on-write(COW) *** implement the performance optimization mechanisms in a prototype system,called *** results with a group of representative applications show that our page eviction scheme and incremental checkpointing can significantly reduce the checkpoint file size by up to 87% and shorten the total checkpointing/restart time by a factor of up to 71%,in comparison with the Xens default checkpointing *** observed application downtimes due to checkpointing can be reduced to as small as 300 ms.

关键词： checkpoint/restart copy-on-write page eviction virtual machine

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The Entry-Extensible Cuckoo Filter 17th

The Entry-Extensible Cuckoo Filter

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17th IFIP WG 10.3 International Conference on Network and Parallel computing, NPC 2020

作者： Yu, Shuiying Wu, Sijie Chen, Hanhua Jin, Hai National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9783030794774

The emergence of large-scale dynamic sets in real applications brings severe challenges in approximate set representation structures. A dynamic set with changing cardinality requires an elastic capacity of the approximate set representation structure, while traditional static structures, e.g., bloom filter, cuckoo filter, and their variants cannot satisfy the requirements. Existing dynamic approximate set representation structures only provide filter-level extensions, which require a single membership query to probe all discrete filters one by one. The large number of small discrete memory accesses takes up the vast majority of query time and results in unsatisfied query performance. To address the problem, in this work we propose the entry-extensible cuckoo filter (E2CF) to reduce memory access overhead for dynamic set representation and accelerate the membership query. E2CF utilizes adjacent buckets with continuous physical addresses in a cuckoo filter to extend bucket entries, which avoids many discrete memory accesses in a query. To further make E2CF space and time efficient, we adopt asynchronous extension and fine-grained splitting methods. Experiment results show that compared to state-of-the-art designs, E2CF reduces the query and insertion time by 82% and 28%, respectively. © 2021, IFIP International Federation for Information Processing.

关键词： Data structures

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SpaHet: A Software/Hardware Co-design for Accelerating Heterogeneous-Sparsity based Sparse Matrix Multiplication 24

SpaHet: A Software/Hardware Co-design for Accelerating Heter...

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61st ACM/IEEE Design Automation Conference, DAC 2024

作者： Huang, Haoqin Yao, Pengcheng An, Zhaozeng Sun, Yufei Hu, Ao Xu, Peng Zheng, Long Liao, Xiaofei Jin, Hai National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab Huazhong University of Science and Technology Wuhan430074 China Zhejiang Lab Hangzhou311121 China

ISBN: (纸本)9798400706011

Sparse general matrix-matrix multiplication is widely used in data mining applications. Its irregular memory access patterns limit the performance of general-purpose processors, thus motivating many FPGA-based hardware innovations in recent years. Nevertheless, existing accelerators fail to efficiently support heterogeneous input matrix sparsity, which is universal in various real-world applications. With in-depth experimental analysis, we observe that their performance is bottlenecked by their fixed tiling mechanisms, which only alleviate the irregularity of one input matrix. Based on the observation, we propose SpaHet, a software/hardware co-design to accelerate heterogeneous-sparsity based sparse matrix multiplication. SpaHet adopts a dual-adaptive sliding window mechanism to cover the reuse characteristics of both input matrices simultaneously. With a specialized exploration algorithm, the window-based mechanism can automatically find the optimal tiling strategy instead of applying a fixed one based on empirical experience. A sparsity-aware merge tree is also proposed to maximize the output matrix reuse via accumulating intermediate results thoroughly. Our results on a Xilinx Alveo U280 accelerator card show that SpaHet outperforms state-of-the-art CPU-, GPU- and FPGA-based solutions by 7.71×, 1.1×, and 2.74× in performance, respectively. © 2024 Copyright is held by the owner/author(s). Publication rights licensed to ACM.

关键词： Program processors

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Semantic Reasoning technology on Temporal Knowledge Graph 19th

Semantic Reasoning Technology on Temporal Knowledge Graph

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19th International Conference on Web Information systems and Applications, WISA 2022

作者： Li, Jianuo Zhao, Feng Jin, Hai National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9783031203084

Semantic reasoning techniques based on knowledge graphs have been widely studied since they were proposed. Previous studies are mostly based on closed-world assumptions, which cannot reason about unknown facts. To this end, we propose the Two-Stage Temporal Reasoning Model (TSTR) for reasoning about future facts. In the first stage, probability of future facts occurring is reasoned using repeated information in history. In the second stage, the semantics of the neighborhood nodes are aggregated using the structural encoder and the temporal information is captured using the temporal encoder. The predicted probabilities are obtained by the decoder. Finally, the candidate entity probabilities of the two-stage reasoning are weighted to achieve the prediction of the two-stage fusion. We tested the performance of the TSTR on public datasets and the results demonstrated the effectiveness of the TSTR. © 2022, The Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Recurrent neural networks

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Fusion of Natural Language and Knowledge Graph for Multi-hop Reasoning 19th

Fusion of Natural Language and Knowledge Graph for Multi-hop...

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19th International Conference on Web Information systems and Applications, WISA 2022

作者： Lu, Xun Zhao, Feng Jin, Hai National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9783031203084

Multi-hop reasoning has been widely studied for its important application values in the domain of intelligent search and question answering. Real-world applications are often dominated by natural language input, and it is difficult to directly model the relation semantics in natural language to fit the multi-hop reasoning model. In addition, the extremely large scale and complex structure of knowledge graphs increase the challenge. We propose a natural language and knowledge graph fusion model (NLKGF) for multi-hop reasoning. NLKGF embeds knowledge graph by fusing natural language semantics during the graph propagation process and adds a relation attention mechanism to enable entity representations to perceive the contribution of different relations. A relation path encoder is designed to encode the relation path by an improved recurrent neural network, the reasoning entity is obtained by calculating the correlation score with the natural language. We tested the performance of the NLKGF model on two datasets requiring multi-hop reasoning. The experimental results show that NLKGF beats advanced benchmark models in multi-hop reasoning tasks, which proves superiority of our model. © 2022, The Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Knowledge graph

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ReSQM: Accelerating Database Operations Using ReRAM-Based Content Addressable Memory

ReSQM: Accelerating Database Operations Using ReRAM-Based Co...

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作者： Li, Huize Jin, Hai Zheng, Long Liao, Xiaofei National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

The huge amount of data enforces great pressure on the processing efficiency of database systems. By leveraging the in-situ computing ability of emerging nonvolatile memory, processing-in-memory (PIM) technology shows great potential in accelerating database operations against traditional architectures without data movement overheads. In this article, we introduce ReSQM, a novel ReCAM-based accelerator, which can dramatically reduce the response time of database systems. The key novelty of ReSQM is that some commonly used database queries that would be otherwise processed inefficiently in previous studies can be in-situ accomplished with massively high parallelism by exploiting the PIM-enabled ReCAM array. ReSQM supports some typical database queries (such as SELECTION, SORT, and JOIN) effectively based on the limited computational mode of the ReCAM array. ReSQM is also equipped with a series of hardware-algorithm co-designs to maximize efficiency. We present a new data mapping mechanism that allows enjoying in-situ in-memory computations for SELECTION operating upon intermediate results. We also develop a count-based ReCAM-specific algorithm to enable the in-memory sorting without any row swapping. The relational comparisons are integrated for accelerating inequality join by making a few modifications to the ReCAM cells with negligible hardware overhead. The experimental results show that ReSQM can improve the (energy) efficiency by $611\times $ ( $193\times $ ), $19\times $ ( $17\times $ ), $59\times $ ( $43\times $ ), and $307\times $ ( $181\times $ ) in comparison to a 10-core Intel Xeon E5-2630v4 processor for SELECTION, SORT, equi-join, and inequality join, respectively. In contrast to state-of-the-art CMOS-based CAM, GPU, FPGA, NDP, and PIM solutions, ReSQM can also offer $2.2\times 39\times $ speedups. © 1982-2012 IEEE.

关键词： Query languages

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A multi-dimensional index for privacy-preserving queries in cloud computing

A multi-dimensional index for privacy-preserving queries in ...

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作者： Xu, Hui Ding, Xiaofeng Jin, Hai Yu, Qing National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

Although cloud computing saves the cost of enterprises and individuals to manage data in various applications on public cloud servers, it also causes the problem of the leakage of critical personal information and sensitive data. Therefore, the issues about data privacy of the published personal information have become a challenging problem. Most of the existing methods focus on cryptography-based techniques by encrypting the sensitive data before publishing. However, these techniques are either too computation expensive or only some authorized users can get access to the encrypted cloud data. The consequence is that the search response time is not satisfactory and the sharing extent of the cloud data is becoming limited. Motivated by this, we propose a perturbation-based method to preserve the privacy of data in cloud. To accelerate the query processing without privacy breaches, a high-efficiency multi-dimensional index is built for answering range counting queries under differential privacy, which embeds privacy-preserving R-tree index in Content Addressable Network. Experimental results demonstrate that our methods not only protect data privacy in different degree, but also accelerate the query speed efficiently. Compared with the existing method Quad-opt, our method provides about 20% better data utility under the same differential privacy principles. © 2019 John Wiley & Sons, Ltd.

关键词： Sensitive data

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Commonsense Knowledge Construction with Concept and Pretrained Model 19th

Commonsense Knowledge Construction with Concept and Pretrain...

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19th International Conference on Web Information systems and Applications, WISA 2022

作者： Cai, Hanjun Zhao, Feng Jin, Hai National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Huazhong University of Science and Technology Wuhan China

ISBN: (纸本)9783031203084

Commonsense knowledge (CSK) is the information that people use in daily life but do not often mention. It summarizes the practical knowledge about how the world works. Existing machines have knowledge but lack commonsense because they do not understand and master commonsense knowledge in the same way that humans do. In the latest works, crowdsourcing-based method is costly and has low coverage, knowledge base completion method can highly fit samples, and methods extracted from unstructured data have the defects of low quality. CG &BF is commonsense knowledge construction with a concept-based generator and a BERT-based filter. We utilize semantic search for node matching and entropy encoder for filtering triples with high abstraction. Two algorithms based on concept aggregation and path credibility are proposed to obtain high-quality CSK triples. We subsequently finetuning a BERT to filter incorrect triples. We obtain 500,000 CSK triples based on ConceptNet, which is superior to other construction methods in novelty and quality. In the reading comprehension task, the three-way attention network is selected as the basic model and the knowledge we generate enables the base model to perform better, which proves that the output of CG &BF has higher quality and ease of use. © 2022, The Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Knowledge graph

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Fine-grained Scheduling in FPGA-Based Convolutional Neural Networks 5

Fine-grained Scheduling in FPGA-Based Convolutional Neural N...

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5th IEEE International Conference on Cloud computing and Big Data Analytics, ICCCBDA 2020

作者： Zhang, Wei Liao, Xiaofei Jin, Hai Huazhong University of Science and Technology National Engineering Research Center for Big Data Technology and System Services Computing Technology and System Lab Cluster and Grid Computing Lab School of Computer Science and Technology Wuhan China

ISBN: (纸本)9781728160245

FPGA has been considered as a promising solution to accelerate Convolutional Neural Networks (CNNs) for its excellent performance in energy efficiency and programmability. However, prior designs are usually designed for inference only as designers can map pre-trained models to the hardware in a very efficient way. However, those approaches may not be suitable for training CNN models. In this paper, we propose FConv, in which the CPU and FPGA work together in a fine-grained manner. The FPGA accelerator in FConv uses one Winograd-based convolver, which reduces the design complexity and improves performance. We apply double-buffer for output routine to effectively overlap computation and data transfer. We also integrate multiple PEs to improve data parallelism. We propose our analytical model for prediction and use it as a guide in task scheduling. We find the upper limit of performance under the current design based on the analytical model. We evaluate our design on VGG-16 and Densnet-40 on ImageNet and CIFAR-10. We achieve 262.43 GOP/s on the VGG-16 model, which is 2.13 times of the performance compared to FFT-based implementation on the same platform. We also achieve at most 4 times+ performance improvement compared MKL with 20 threads running on 10 core Intel processors. © 2020 IEEE.

关键词： Field programmable gate arrays (FPGA)

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