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FLAG: A framework for FPGA-based LoAd generation in profinet communication

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arXiv 2019年

作者： Khaliq, Ahmad Saha, Sangeet Bhatt, Bina Gu, Dongbing Howells, Gareth McDonald-Maier, Klaus Embedded and Intelligent System Lab School of Computer Science and Electronic Engineering University of Essex Colchester United Kingdom Secure Electronic Systems University of Kent United Kingdom

Like other automated system technologies, PROFINET, a real-time Industrial Ethernet Standard has shown increasing level of integration into the present IT Infrastructure. Such vast use of PROFINET can expose the controllers and I/O devices to operate in critical failures when traffic goes unexpectedly higher than normal. Rigorous testing of the running devices then becomes essential and therefore, in this paper, we prototype and design an FPGA based load Generating solution called FLAG (FPGA-based LoAd Generator) for PROFINET based traffic at the desired load configurations such as, bits per second, the number and size of the packets with their Ethertypes and MAC addresses. We have employed, a Zynq-7000 FPGA as our implementation platform for the proposed FLAG framework. The system can easily be deployed and accessed via the web or command line interface for successful load generation. Extensive experiments have been conducted to verify the effectiveness of our proposed solution and the results confirm that the proposed framework is capable to generate precise load at Fast/Gigabit line rate with a defined number of packets. Copyright © 2019, The Authors. All rights reserved.

关键词： Field programmable gate arrays (FPGA)

Restoring Vision in Adverse Weather Conditions with Patch-Based Denoising Diffusion Models

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arXiv 2022年

作者： Özdenizci, Ozan Legenstein, Robert The Institute of Theoretical Computer Science Graz University of Technology Graz Austria Tu Graz Sal Dependable Embedded Systems Lab Silicon Austria Labs Graz Austria

Image restoration under adverse weather conditions has been of significant interest for various computer vision applications. Recent successful methods rely on the current progress in deep neural network architectural designs (e.g., with vision transformers). Motivated by the recent progress achieved with state-of-the-art conditional generative models, we present a novel patch-based image restoration algorithm based on denoising diffusion probabilistic models. Our patch-based diffusion modeling approach enables size-agnostic image restoration by using a guided denoising process with smoothed noise estimates across overlapping patches during inference. We empirically evaluate our model on benchmark datasets for image desnowing, combined deraining and dehazing, and raindrop removal. We demonstrate our approach to achieve state-of-the-art performances on both weather-specific and multi-weather image restoration, and experimentally show strong generalization to real-world test images. Copyright © 2022, The Authors. All rights reserved.

关键词： Image reconstruction

Sit Back and Relax: Learning to Drive Incrementally in All Weather Conditions

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arXiv 2023年

作者： Leitner, Stefan Mirza, M. Jehanzeb Lin, Wei Micorek, Jakub Masana, Marc Kozinski, Mateusz Possegger, Horst Bischof, Horst Institute for Computer Graphics and Vision Graz University of Technology Austria Christian Doppler Laboratory for Embedded Machine Learning Austria Christian Doppler Laboratory for Semantic 3D Computer Vision Austria TU Graz SAL Dependable Embedded Systems Lab Silicon Austria Labs Austria

In autonomous driving scenarios, current object detection models show strong performance when tested in clear weather. However, their performance deteriorates significantly when tested in degrading weather conditions. In addition, even when adapted to perform robustly in a sequence of different weather conditions, they are often unable to perform well in all of them and suffer from catastrophic forgetting. To efficiently mitigate forgetting, we propose Domain-Incremental Learning through Activation Matching (DILAM), which employs unsupervised feature alignment to adapt only the affine parameters of a clear weather pre-trained network to different weather conditions. We propose to store these affine parameters as a memory bank for each weather condition and plug-in their weather-specific parameters during driving (i.e. test time) when the respective weather conditions are encountered. Our memory bank is extremely lightweight, since affine parameters account for less than 2% of a typical object detector. Furthermore, contrary to previous domain-incremental learning approaches, we do not require the weather label when testing and propose to automatically infer the weather condition by a majority voting linear classifier. © 2023, CC BY.

关键词： Object detection

Pixie: A heterogeneous virtual coarse-grained reconfigurable array for high performance image processing applications

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arXiv 2017年

作者： Kulkarni, Amit Stroobandt, Dirk Werner, Andre Fricke, Florian Huebner, Michael ELIS Department Computer Systems Lab Ghent University iGent Technologiepark Zwijnaarde 15 GhentB-9052 Belgium Chair for Embedded Systems for Information Technology Ruhr University of Bochum Bochum44780 Germany

Coarse-Grained Reconfigurable Arrays (CGRAs) enable ease of programmability and result in low development costs. They enable the ease of use specifically in reconfigurable computing applications. The smaller cost of compilation and reduced reconfiguration overhead enables them to become attractive platforms for accelerating high-performance computing applications such as image processing. The CGRAs are ASICs and therefore, expensive to produce. However, Field Programmable Gate Arrays (FPGAs) are relatively cheaper for low volume products but they are not so easily programmable. We combine best of both worlds by implementing a Virtual Coarse-Grained Reconfigurable Array (VCGRA) on FPGA. VCGRAs are a trade off between FPGA with large routing overheads and ASICs. In this perspective we present a novel heterogeneous Virtual Coarse-Grained Reconfigurable Array (VCGRA) called "Pixie" which is suitable for implementing high performance image processing applications. The proposed VCGRA contains generic processing elements and virtual channels that are described using the Hardware Description Language VHDL. Both elements have been optimized by using the parameterized configuration tool flow and result in a resource reduction of 24% for each processing elements and 82% for each virtual channels respectively. Copyright © 2017, The Authors. All rights reserved.

关键词： Field programmable gate arrays (FPGA)

Partial-LastZ: An optimized hybridization technique for 3D NoC architecture enabling adaptive inter-layer communication

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Partial-LastZ: An optimized hybridization technique for 3D N...

International SoC Design Conference, ISOCC

作者： Amir-Mohammad Rahmani Pasi Liljeberg Juha Plosila Ka Lok Man Youngmin Kim Hannu Tenhunen Embedded Computer and Electronic Systems Lab. University of Turku Finland Xi'an Jiaotong-Liverpool University China UNIST (Ulsan National Institute of Science and Technology) South Korea

Three-dimensional (3D) integration offers greater device integration, reduced signal delay and reduced interconnect power. It also provides greater design flexibility by allowing heterogeneous integration. Stacked mesh 3D NoC architecture was proposed to take advantage of the intrinsic capability of reducing the wire length in 3D ICs. However, this architecture still exacerbates the on-chip power density and router cost. In this paper, we propose a novel hybridization scheme for inter-layer communication using efficient 5-input routers to enhance the overall system power, performance, and area characteristics of the existing Hybrid NoC-Bus 3D mesh architecture. By defining a rule for routing algorithms called LastZ, the proposed area-efficient architecture decreases the overall average hop count of a NoC-based system compared to the existing architectures. We further improve this design by proposing partial-LastZ-based 3D NoC-bus hybrid architecture to provide adaptivity for implementing congestion-aware and fault-tolerant inter-layer routing algorithms. Extensive quantitative experiments demonstrate up to 16% performance improvement compared to the full LastZ-based 3D NoC-bus hybrid architecture and around 20% area reduction compared to the typical hybrid NoC-Bus 3D mesh architecture.

关键词： Routing computer architecture System-on-a-chip Educational institutions Algorithm design and analysis Power demand

Haptic control of a mobile robot: A user study

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Haptic control of a mobile robot: A user study

2002 IEEE/RSJ International Conference on Intelligent Robots and systems

作者： Lee, Sangyoon' Sukhatme, Gaurav S. Kim, Gerard Jounghyun Park, Chan-Mo Virtual Reality Laboratory Dept. of Comp. Sci. and Eng. Pohang Univ. of Sci. and Technol. Pohang Kyoungbuk 790-784 Korea Republic of Robotic Embedded Systems Lab. Dept. of Computer Science University of Southern California Los Angeles CA 90089-0781 United States

We address the problem of teleoperating a mobile robot using shared autonomy: an on-board controller performs obstacle avoidance while the operator uses the manipulandum of a haptic probe to designate the desired speed and rate of turn. Sensors on the robot are used to measure obstacle range information. We describe a strategy to convert such range information into forces, which are reflected to the operator's hand, via the haptic probe. This haptic information provides feedback to the operator in addition to imagery from a front-facing camera mounted on the mobile robot. Extensive experiments with a user population show that the added haptic feedback significantly improves operator performance in several ways (reduced collisions, increased minimum distance between the robot and obstacles) without a significant increase in navigation time.

关键词： Mobile robots

Distributed nonlinear model predictive control and metric learning for heterogeneous vehicle platooning with cut-in/cut-out maneuvers

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arXiv 2020年

作者： Basiri, Mohammad Hossein Ghojogh, Benyamin Azad, Nasser L. Fischmeister, Sebastian Karray, Fakhri Crowley, Mark The Department of Systems Design Engineering University of Waterloo ON Canada The Department of Electrical and Computer Engineering University of Waterloo ON Canada The Smart Hybrid and Electric Vehicles Systems Lab The Real-Time Embedded Software Lab The Machine Learning Lab The Centre for Pattern Analysis and Machine Intelligence

Vehicle platooning has been shown to be quite fruitful in the transportation industry to enhance fuel economy, road throughput, and driving comfort. Model Predictive Control (MPC) is widely used in literature for platoon control to achieve certain objectives, such as safely reducing the distance among consecutive vehicles while following the leader vehicle. In this paper, we propose a Distributed Nonlinear MPC (DNMPC), based upon an existing approach, to control a heterogeneous dynamic platoon with unidirectional topologies, handling possible cut-in/cut-out maneuvers. The introduced method addresses a collision-free driving experience while tracking the desired speed profile and maintaining a safe desired gap among the vehicles. The time of convergence in the dynamic platooning is derived based on the time of cut-in and/or cut-out maneuvers. In addition, we analyze the improvement level of driving comfort, fuel economy, and absolute and relative convergence of the method by using distributed metric learning and distributed optimization with Alternating Direction Method of Multipliers (ADMM). Simulation results on a dynamic platoon with cut-in and cut-out maneuvers and with different unidirectional topologies show the effectiveness of the introduced method. Copyright © 2020, The Authors. All rights reserved.

关键词： Topology

A New Approach for the Analysis of Resistance to Change in the Digital Transformation Context 11th

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A New Approach for the Analysis of Resistance to Change in t...

10th International Conference on Innovation and New Trends in Information Technology, INTIS 2022 and 11th International Conference on Innovation and New Trends in Information Technology, INTIS 2023

作者： El Karam, Bachira Abou Marghoubi, Rabia Khanboubi, Fadoua Allaki, Driss InnovatiVE REsearch on Software Systems and data INPT Rabat Morocco LIM Lab. IOS team Department of Computer Science FSTM Casablanca Morocco Smart Embedded Enterprise and Distributed Systems INPT Rabat Morocco

ISBN: (纸本)9783031473654

In a context marked by the rapid evolution of technologies and the omnipresence of IT at the heart of all activities, the digital transformation of companies is no longer a luxury but an absolute necessity. This technological transformation can lead to resistance from the employees affected by the change. In order to properly conduct the change management process, it is necessary to ensure the involvement of employees from the beginning of this process, which is composed of three phases: the change management strategy, the diagnosis, and the actions implementation. This paper focuses on the diagnostic phase and more specifically on the evaluation stage. This evaluation measures the employees’ hesitation to express their degree of resistance toward the digital initiatives launched in the company. However, this assessment is usually done subjectively, and employees express their hesitation in non-uniform manners. In this work, we propose a weighted generalized hesitating fuzzy approach based on the fusion of theoretical concepts of generalized hesitant fuzzy sets and formal concept analysis (FCA), to formalize the measurement of degree hesitation in change resistance. This approach is flexible and allows the top management of each organizational unit to correctly measure the resistance to change of their teams and then evaluate that measure at the global organizational level. © 2024, The Author(s), under exclusive license to Springer Nature Switzerland AG.

关键词： Decision making

Capturing processor architectures from protocol processing applications: a case study

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Capturing processor architectures from protocol processing a...

Euromicro Symposium on Digital System Design

作者： S. Virtanen J. Paakkulainen T. Nurmi Department of Information Tehnology Embedded Systems Lab Turku Centre for Computer Science (TUCS) University of Turku Turku Finland Department of Information Tehnology University of Turku Turku Finland

We present a case study in finding optimized processor architectures for a given protocol processing application. The process involves application analysis, hardware/software partitioning and optimization, and evaluation of design quality through simulations, estimations and synthesis. The case study was targeted at processing key IPv6 routing functions at 200 MHz using 0.18 /spl mu/m CMOS technology. A comparison to an implementation on a commercial processor revealed that the captured architectures provided similar or better performance. Especially checksum calculation was efficient in the captured architectures.

关键词： Protocols computer architecture Application software CMOS technology Hardware Software quality Design optimization Analytical models Routing CMOS process