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2nd ACM SIGPLAN Symposium on Principles and Practice of parallel Programming, PPOPP 1990

作者： Chang, Pau S. Egan, Gregory K. Jt. Roy. Melbourne Inst. of Technol. and Cmw. Scientific and Industrial Research Organisation Parallel Systems Architecture Project Australia Royal Melbourne Institute of Technology Dept of Communication and Electrical Engineering 124 La Trobe St. Melbourne3000 Australia Department of Computer Systems Engineering Swinburne Institute of Technology School of Electrical Engineering John Street Hawthorn3122 Australia

ISBN: (纸本)0897913507

Numerical Weather Prediction (NWP) is acknowledged as being of vital importance to economy. The demand that NWP places on computing system performance has increased dramatically since the introduction of computer systems and is siili growing. This paper describes the implementation of a one-level barotropic spectral NWP model using the high level functional language SISAL. Our initial approach was a direct transliteration from FORTRAN to SISAL, the result of which was a large amount of array copying and loss of parallelism. The algorithm of the model was then rearranged to enable effective exploitation of parallelism by an optimising SISAL compiler. The parallel implementation technique and its potential for modeling with larger model sizes are discussed, and the improved results for an Encore Multimax multiprocessor are presented. © 1990 ACM.

关键词： High level languages

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SEMI-LAGRANGIAN EXPONENTIAL INTEGRATION WITH APPLICATION TO THE ROTATING SHALLOW WATER EQUATIONS ∗

arXiv

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arXiv 2019年

作者： Peixoto, Pedro S. Schreiber, Martin Instituto de Matemática e Estatística Universidade de São Paulo Brazil Chair of Computer Architecture and Parallel Systems Technical University of Munich Germany

In this paper we propose a novel way to integrate time-evolving partial differential equations that contain nonlinear advection and stiff linear operators, combining exponential integration techniques and semi-Lagrangian methods. The general formulation is built from the solution of an integration factor problem with respect to the problem written with a material derivative, so that the exponential integration scheme naturally incorporates the nonlinear advection. Semi-Lagrangian techniques are used to treat the dependence of the exponential integrator on the flow trajectories. The formulation is general, as many exponential integration techniques could be combined with different semi-Lagrangian methods. This formulation allows an accurate solution of the linear stiff operator, a property inherited by the exponential integration technique. It also provides a sufficiently accurate representation of the nonlinear advection, even with large time-step sizes, a property inherited by the semi-Lagrangian method. Aiming for application in weather and climate modeling, we discuss possible combinations of well established exponential integration techniques and state-of-the-art semi-Lagrangian methods used operationally in the application. We show experiments for the planar rotating shallow water equations. When compared to traditional exponential integration techniques, the experiments reveal that the coupling with semi-Lagrangian allows stabler integration with larger time-step sizes. From the application perspective, which already uses semi-Lagrangian methods, the exponential treatment could improve the solution of wave-dispersion when compared to semi-implicit schemes. Copyright © 2019, The Authors. All rights reserved.

关键词： Advection

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Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors

Chip-Level Redundancy in Distributed Shared-Memory Multiproc...

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Pacific Rim International Symposium on Dependable Computing

作者： Brian T. Gold Babak Falsafi James C. Hoe Computer Architecture Laboratory Carnegie Mellon University USA Sun MicroSystems Laboratories Inc. Menlo Park CA USA Parallel Systems Architecture Laboratory École Polytechnique Fédérale de Lausanne Switzerland

Distributed shared-memory (DSM) multiprocessors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a key challenge: the increased latency to check results among redundant components. To address performance overheads, we propose a checking filter that reduces the number of checking operations impeding the critical path of execution. Furthermore, we propose to decouple checking operations from the coherence protocol, which simplifies the implementation and permits reuse of existing coherence controller hardware. Our simulation results of commercial workloads indicate average performance overhead is within 4% (9% maximum) of tightly coupled DMR solutions.

关键词： Hardware Redundancy Filters Protocols Protection computer architecture Delay Clocks Circuit faults Availability

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IAD: Indirect anomalous VMMs detection in the cloud-based environment

arXiv

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arXiv 2021年

作者： Jindal, Anshul Shakhat, Ilya Cardoso, Jorge Gerndt, Michael Podolskiy, Vladimir Computer Architecture and Parallel Systems Technical University of Munich Garching Germany Huawei Munich Research Center Huawei Technologies Munich Germany University of Coimbra CISUC DEI Coimbra Portugal

Server virtualization in the form of virtual machines (VMs) with the use of a hypervisor or a Virtual Machine Monitor (VMM) is an essential part of cloud computing technology to provide infrastructureas-a-service (IaaS). A fault or an anomaly in the VMM can propagate to the VMs hosted on it and ultimately affect the availability and reliability of the applications running on those VMs. Therefore, identifying and eventually resolving it quickly is highly important. However, anomalous VMM detection is a challenge in the cloud environment since the user does not have access to the VMM. This paper addresses this challenge of anomalous VMM detection in the cloud-based environment without having any knowledge or data from VMM by introducing a novel machine learning-based algorithm called IAD: Indirect Anomalous VMMs Detection. This algorithm solely uses the VM's resources utilization data hosted on those VMMs for the anomalous VMMs detection. The developed algorithm's accuracy was tested on four datasets comprising the synthetic and real and compared against four other popular algorithms, which can also be used to the described problem. It was found that the proposed IAD algorithm has an average F1-score of 83.7% averaged across four datasets, and also outperforms other algorithms by an average F1-score of 11%. © 2021, CC BY.

关键词： Anomaly detection

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Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions

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Cluster Computing 2001年第4期4卷 281-293页

作者： Amaral, José Nelson Lin, Wen-Yen Gaudiot, Jean-Luc Gao, Guang R. Department of Computing Science University of Alberta Edmonton Canada Tia Mobile Inc. Pasadena USA Department of Electrical Engineering University of Southern California Los Angeles USA Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark USA

We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient architecture for Running Threads (EARTH). The I-Structure Software-Controlled Cache (ISSC) exploits temporal and spatial locality of EARTH split-phased memory transactions for single-assignment memory references. Our experimental evaluation indicates that the caching mechanism for single-assignment storage makes the EARTH memory system more robust to variations in the latency of memory operations. As a consequence the system can be ported to a wider range of machine platforms and deliver speedup for both regular and irregular application.

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Combining gait research of the quadruped/biped reconfigurable walking chair with parallel leg mechanism

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4th International Conference on Social Robotics, ICSR 2012

作者： Hu, Xing Wang, Hongbo Sang, Lingfeng Gu, Qifang Yuan, Lin School of Mechanical and Electrical Engineering Xi'an University of Architecture and Technology Xi'an Shanxi 710055 China Ministry of Education Key Laboratory of Advanced Forging Technology and Science Hebei Province Key Laboratory of Parallel Robot and Mechatronics Systems Yanshan University Qinhuangdao Hebei 066004 China Department of Computer Wuxi City College of Vocational Technology Wuxi 214063 China

ISBN: (纸本)9783642341021

The quadruped/biped reconfigurable walking robot with parallel leg mechanism can realize not only the quadruped walking, but also the biped walking. The converting process from the quadruped to the biped includes locking the vertical revolute pair hinged with the upper platform and combining the corresponding lower platforms. Based on the previous study, the combining schemes of walking chair are researched in this paper, and then the correctness of the combining schemes is analyzed by using the position workspace of the swing leg and the body mechanism in different states which are obtained by the MATLAB software and anti-solution search method. Compared with the stability margin and the adjustment coordination of the body in the different combining schemes, the optimal combining gaits of walking chair are selected, which lays the theoretical foundation for the quadruped/biped converting control of walking chair. © 2012 Springer-Verlag.

关键词： MATLAB

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Superconducting processors for HTMT: issues and challenges

Superconducting processors for HTMT: issues and challenges

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Frontiers of Massively parallel Computation

作者： K.B. Theobald G.R. Gao T.L. Sterling Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark DE USA NASA Jet Propulsion Laboratory /Center for Advanced Computing Research California Institute of Technology Pasadena CA USA

The Hybrid Technology Multi-Threading project is a long-term study of the feasibility of combining several emerging technologies to reach 1 petaFLOPS within ten years. HTMT will combine high-speed superconductor processors, semiconductor memories with built-in processors, high-speed optical interconnects, and high-density holographic storage. While there are major challenges in all aspects of this project, those in processor architecture are the focus of this paper. Fundamental differences between RSFQ circuits and conventional semiconductor circuits, including a radical jump in clock speed, make today's processor design approaches inappropriate for HTMT. Sequential instruction dispatching, even within the lowest programming unit (a strand), will lead to unacceptably high latencies, hence poor performance. We propose alternative processor designs which use fine-grain synchronizations between individual instructions in order to avoid these bottlenecks.

关键词： Random access memory Optical buffering Holography Holographic optical components Delay computer architecture Optical interconnections Electrical capacitance tomography Quantum computing Clocks

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Calibration and Performance Evaluation of a Superconducting Quantum Processor in an HPC Center

Calibration and Performance Evaluation of a Superconducting ...

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ISC High Performance 2024 Research Paper Proceedings (39th International Conference)

作者： Xiaolong Deng Stefan Pogorzalek Florian Vigneau Ping Yang Martin Schulz Laura Schulz QCT Department Leibniz Supercomputing Centre Garching Germany Technology Department IQM Quantum Computers Munich Germany Chair of Computer Architecture and Parallel Systems Technical University of Munich Munich Germany

As quantum computers mature, they migrate from laboratory environments to HPC centers. This movement enables large-scale deployments, greater access to the technology, and deep integration into HPC in the form of quantum acceleration. In laboratory environments, specialists directly control the systems' environments and operations at any time with hands-on access, while HPC centers require remote and autonomous operations with minimal physical contact. The requirement for automation of the calibration process needed by all current quantum systems relies on maximizing their coherence times and fidelities and, with that, their best performance. It is, therefore, of great significance to establish a standardized and automatic calibration process alongside unified evaluation standards for quantum computing performance to evaluate the success of the calibration and operation of the system. In this work, we characterize our in-house superconducting quantum computer, establish an automatic calibration process, and evaluate its performance through quantum volume and an application-specific algorithm. We also analyze readout errors and improve the readout fidelity, leaning on error mitigation.

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A systematic mapping study in AIOps

arXiv

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arXiv 2020年

作者： Notaro, Paolo Cardoso, Jorge Gerndt, Michael Chair of Computer Architecture and Parallel Systems Technical University of Munich Germany Ultra-scale AIOps Lab Huawei Munich Research Center Germany Department of Informatics Engineering/CISUC University of Coimbra Portugal

IT systems of today are becoming larger and more complex, rendering their human supervision more difficult. Artificial Intelligence for IT Operations (AIOps) has been proposed to tackle modern IT administration challenges thanks to AI and Big Data. However, past AIOps contributions are scattered, unorganized and missing a common terminology convention, which renders their discovery and comparison impractical. In this work, we conduct an in-depth mapping study to collect and organize the numerous scattered contributions to AIOps in a unique reference index. We create an AIOps taxonomy to build a foundation for future contributions and allow an efficient comparison of AIOps papers treating similar problems. We investigate temporal trends and classify AIOps contributions based on the choice of algorithms, data sources and the target components. Our results show a recent and growing interest towards AIOps, specifically to those contributions treating failure-related tasks (62%), such as anomaly detection and root cause analysis. © 2020, CC BY.

关键词： Artificial intelligence

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An Optical Transceiver Reliability Study based on SFP Monitoring and OS-level Metric Data

An Optical Transceiver Reliability Study based on SFP Monito...

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IEEE/ACM International Symposium on Cluster Computing and the Grid (CCGRID)

作者： Paolo Notaro Qiao Yu Soroush Haeri Jorge Cardoso Michael Gerndt Huawei Technologies Duesseldorf GmbH Munich Germany Chair of Computer Architecture and Parallel Systems Technical University of Munich Germany Chair of Distributed and Operating Systems Technical University of Berlin Germany Department of Informatics Engineering/CISUC University of Coimbra Portugal

The increasing demand for cloud computing drives the expansion in scale of datacenters and their internal optical network, in a strive for increasing bandwidth, high reliability, and lower latency. Optical transceivers are essential elements of optical networks, whose reliability has not been well-studied compared to other hardware components. In this paper, we leverage high quantities of monitoring data from optical transceivers and OS-level metrics to provide statistical insights about the occurrence of optical transceiver failures. We estimate transceiver failure rates and normal operating ranges for monitored attributes, correlate early-observable patterns to known failure symptoms, and finally develop failure prediction models based on our analyses. Our results enable network administrators to deploy early-warning systems and enact predictive maintenance strategies, such as replacement or traffic re-routing, reducing the number of incidents and their associated costs.

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