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What’s Missing in Agile Hardware Design? Verification!

Journal of computer Science & Technology 2023年第4期38卷 735-736页

作者： Babak Falsafi Parallel Systems Architecture Laboratory Institute of Computer and Communication SciencesSchool of Computer andCommunication SciencesEcole Polytechnique Fédérale de LausanneLausanneCH-1015Switzerland

Agile hardware design is an approach to developing hardware systems that draws inspiration from the principles and practices of agile software *** emphasizes collaboration,flexibility,iterative development,and quick adaptation to changing *** agile hardware design,the focus is on delivering functionalhardware systems in shorter development cycles while maintaining high-quality and customer *** particular,agile hardware design is of great interest in the open-source hardware ***-sourcehardware development—such as RISC-V—is at the forefront of initiatives to democratize hardware and drive innovation in chip design *** design is instrumental for the RISC-V community because it supportsrapid iteration,accommodates the evolving RISC-V standard and the addition of custom extensions,improvescommunity collaboration and time-to-market,and addresses the design challenges associated with complex architectural features.

关键词： hardware agile architectural

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Coping with very high latencies in petaflop computer systems 2nd

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2nd International Symposium on High Performance Computing, ISHPC 1999

作者： Ryan, Sean Amaral, José N. Gao, Guang Ruiz, Zachary Marquez, Andres Theobald, Kevin Computer Architecture and Parallel Systems Laboratory University of Delaware NewarkDE United States

ISBN: (纸本)3540659692

The very long and highly variable latencies in the deep memory hierarchy of a petaflop-scale architecture design, such as the Hybrid Technology Multi-Threaded architecture (HTMT) [13], present a new challenge to its programming and execution model. A solution to coping with such high and variable latencies is to directly and explicitly expose the different memory regions of the machine to the program execution model, allowing better management of communication. In this paper we describe the novel percolation model that lies at the heart of the HTMT program execution model [13]. The Percolation Model combines multithreading with dynamic prefetching of coarse-grain contexts. In the past, prefetching techniques have concentrated on moving blocks of data within the memory hierarchy. Instead of only moving contiguous blocks of data, the thread percolation approach manages contexts that include data, program instructions, and control states. The main contributions of this paper include the specification of the HTMT runtime execution model based on the concept of percolation, and a discussion of the role of the compiler in a machine that exposes the memory hierarchy to the programming model. © 1999, Springer-Verlag. All rights reserved.

关键词： Solvents

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Massively parallel breadth first search using a tree-structured memory model

Massively parallel breadth first search using a tree-structu...

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2012 International Workshop on Programming Models and Applications for Multicores and Manycores, PMAM 2012

作者： St. John, Tom Dennis, Jack B. Gao, Guang R. Computer Architecture and Parallel Systems Laboratory University of Delaware United States Computer Science and Artificial Intelligence Laboratory Massachusetts Institute of Technology United States

ISBN: (纸本)9781450312110

Analysis of massive graphs has emerged as an important area for massively parallel computation. In this paper, it is shown how the Fresh Breeze trees-of-chunks memory model may be used to perform breadth-first search of large undirected graphs. Overall, the computation can be expressed as a data flow process wherein a set of vertices to be searched is partitioned into a set of sub-domains and processed independently by many concurrent tasks. The main contributions of the paper are listed below. • We present the first case study demonstrating the power of the Fresh Breeze program execution model (PXM) in the exploitation of fine-grain parallelism found in irregular applications such as graph algorithms. • We present a novel parallel breadth-first search algorithm which is fully determinate. • We describe a unique sparse vector representation that represents the set of adjacencies for each vertex. • We provide an experimental study and analysis of our implementation. An estimate is also made of the performance that might be achieved with a massively parallel system built according to Fresh Breeze principles. © 2012 ACM.

关键词： Forestry

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parallel scientific computing in promoter on the interface between application modelling and language design 98

Parallel scientific computing in promoter on the interface b...

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1998 ACM Symposium on Applied Computing, SAC 1998

作者： Besch, Matthias Heber, Gerd Wilhelmi, Matthias Parallel and Distributed Systems GMD Laboratory GMD-FIRST Rudower Chaussee 5 BerlinD-12489 Germany Computer Architecture and Parallel Systems Laboratory University of Delaware 140 Evans Hall NewarkDE19716 United States

ISBN: (纸本)0897919696

a key issue of problem-oriented parallel programming is an appropriate concept for representing the spatial structures of an application and modelling local or global interactions operating on them. This paper advocates for the use of so-called index spaces as a unified and powerful expression tool. It discusses the interface between application modelling and programming abstractions, and presents their embeddings in the high-level, data parallel language Promoter. © 1998 ACM.

关键词： parallel programming

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Design and implementation of an efficient thread partitioning algorithm 3rd

Design and implementation of an efficient thread partitionin...

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3rd International Symposium on High Performance Computing, ISHPC 2000

作者： Amaral, José Nelson Gao, Guang Kocalar, Erturk Dogan O'Neill, Patrick Tang, Xinan Computer Architecture and Parallel Systems Laboratory University of Delaware NewarkDE United States Dep. of Comp. Science Univ. of Alberta Canada

ISBN: (纸本)9783540411284

The development of fine-grain multi-threaded program ex-ecution models has created an interesting challenge: how to partition a program into threads that can exploit machine parallelism, achieve latency tolerance, and maintain reasonable locality of reference? A suc-cessful algorithm must produce a thread partition that best utilizes mul-tiple execution units on a single processing node and handles long and unpredictable latencies. In this paper, we introduce a new thread partitioning algorithm that can meet the above challenge for a range of machine architecture models. A quantitative aFFInity heuristic is introduced to guide the placement of operations into threads. This heuristic addresses the trade-off between exploiting parallelism and preserving locality. The algorithm is surpris-ingly simple due to the use of a time-ordered event list to account for the multiple execution unit activities. We have implemented the proposed al-gorithm and our experiments, performed on a wide range of examples, have demonstrated its eFFIciency and effectiveness. © Springer-Verlag Berlin Heidelberg 2000.

关键词： Economic and social effects

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Asynchronous Runtimes in Action: An Introspective Framework for a Next Gen Runtime

Asynchronous Runtimes in Action: An Introspective Framework ...

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IEEE International Symposium on parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Joshua Suetterlein Joshua Landwehr Andrés Márquez Joseph B. Manzano Guang R. Gao The Computer Architecture and Parallel Systems Laboratory University of Delaware Newark Delaware Pacific Northwest National Laboratory Richland Washington

ISBN: (纸本)9781509036837

One of the most critical challenges that new highperformance systems face is the lack of system software supportfor these large scale systems. Investment on system stack componentsis essential in the development, debugging and optimizationof the new emerging programming models. These emergingmodels have the promise to better utilize the vast hardwareresources available in current and future systems. To aid in thedevelopment of applications and new system stacks, runtimes, asinstances of their respective execution models, need to producefacilities to introspect their inner workings and allow an indepthattribution of performance bottlenecks and computationalpatterns. In other words, the runtime systems need to reducetheir opacity to observers so that users of a novel programexecution model can adapt their designs to fit the intended modelusage, regardless of the layer that they are working on. Thisdesign/development loop (akin to co-design) enables synergisticopportunities across the entire computational stack. This paper presents the design and implementation of a simple"gray" box performance attribution harness running inside a finegrain runtime system: the Open Community Runtime (OCR). We showcase what such a framework can indicate regarding theruntime behavior while running at scale. To this end, we havedesigned a set of synthetic scenarios aimed to test the runtime attheir best and worst cases. We present an analysis of the mostimportant runtime features, properties and idiosyncrasies thatwill affect the development of new runtime features, algorithmicselection, and application development.

关键词： Runtime Optical character recognition software Instruction sets Computational modeling Adaptation models Message systems Protocols

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Codelet Scheduling by Genetic Algorithm

Codelet Scheduling by Genetic Algorithm

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IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom)

作者： Songwen Pei Jinkai Wang Wenyang Cui Linhua Jiang Tongsheng Geng Jean-Luc Gaudiot Stéphane Zuckerman Shanghai Key Lab of Modern Optical Systems University of Shanghai for Science and Technology Shanghai China Parallel Systems and Computer Architecture Lab University of California Irvine CA USA Computer Architecture & Parallel Systems Laboratory University of Delaware Newark DE

ISBN: (纸本)9781509032068

Codelet model is a fine-grained, event-driven hybrid parallel model inspired by dataflow, whose performance depends on the scheduling policy. How to design optimal codelet scheduling policy based on the features of tasks is important to the codelet-based system performance. In this paper, we propose an adaptive codelet scheduling policy by combing "pure" genetic algorithm for tasks with complex dependencies. It is verified that the policy is effective based on bunches of experimental results.

关键词： Computational modeling Schedules Genetic algorithms Scheduling Runtime Optimal scheduling Sociology

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PreCrime to the rescue: Defeating mobile malware one-step ahead 14

PreCrime to the rescue: Defeating mobile malware one-step ah...

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5th ACM Asia-Pacific Workshop on systems, APSYS 2014

作者： Tan, Cheng Li, Haibo Xia, Yubin Zang, Binyu Chu, Cheng-Kang Li, Tieyan Institute of Parallel and Distributed Systems Shanghai Jiao Tong University China Software School Fudan University China State Key Laboratory of Computer Architecture ICT Chinese Academy of Sciences China Huawei Technologies Pte Ltd. Singapore Singapore

ISBN: (纸本)9781450330244

Prior mobile malware defensive means is usually retroactive, which may either lead to high false negatives or can hardly recover systems states from malware activities. PreCrime is a proactive malware detection scheme that detects and stops malware activities from happening. PreCrime creates mirrors of a mobile device in a resource-rich and trusted cloud, which speculatively executes multiple likely user operations concurrently to detect potential tampering and information leakage. Our preliminary evaluation shows that PreCrime introduces small performance overhead on smartphones and feasible delay during speculative execution on the cloud. © 2014 ACM.

关键词： Malware

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Flexible hardware acceleration for instruction-grain lifeguards

Flexible hardware acceleration for instruction-grain lifegua...

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作者： Chen, Shimin Kozuch, Michael Gibbons, Phillip B. Ryan, Michael Strigkos, Theodoros Mowry, Todd C. Ruwase, Olatunji Vlachos, Evangelos Falsafi, Babak Ramachandran, Vijaya Intel Research Pittsburgh 4720 Forbes Ave. Pittsburgh PA 15213 United States Computer Science Department Carnegie Mellon University Pittsburgh PA United States Parallel Systems Architecture Laboratory École Polytechnique Fédérale de Lausanne Lausanne Switzerland Deartment of Computer Science University of Texas at Austin Austin TX United States

Instruction-grain lifeguards monitor executing programs at the granularity of individual instructions to quickly detect bugs and security attacks, but their fine-grain nature incurs high monitoring overheads. This article identifies three common sources of these overheads and proposes three techniques that together constitute a general-purpose hardware acceleration framework for lifeguards. © 2009 IEEE.

关键词： Data mining

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Combining gait research of the quadruped/biped reconfigurable walking chair with parallel leg mechanism

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4th International Conference on Social Robotics, ICSR 2012

作者： Hu, Xing Wang, Hongbo Sang, Lingfeng Gu, Qifang Yuan, Lin School of Mechanical and Electrical Engineering Xi'an University of Architecture and Technology Xi'an Shanxi 710055 China Ministry of Education Key Laboratory of Advanced Forging Technology and Science Hebei Province Key Laboratory of Parallel Robot and Mechatronics Systems Yanshan University Qinhuangdao Hebei 066004 China Department of Computer Wuxi City College of Vocational Technology Wuxi 214063 China

ISBN: (纸本)9783642341021

The quadruped/biped reconfigurable walking robot with parallel leg mechanism can realize not only the quadruped walking, but also the biped walking. The converting process from the quadruped to the biped includes locking the vertical revolute pair hinged with the upper platform and combining the corresponding lower platforms. Based on the previous study, the combining schemes of walking chair are researched in this paper, and then the correctness of the combining schemes is analyzed by using the position workspace of the swing leg and the body mechanism in different states which are obtained by the MATLAB software and anti-solution search method. Compared with the stability margin and the adjustment coordination of the body in the different combining schemes, the optimal combining gaits of walking chair are selected, which lays the theoretical foundation for the quadruped/biped converting control of walking chair. © 2012 Springer-Verlag.

关键词： MATLAB

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