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检索条件"机构=Computer Architecture & Parallel Systems Laboratory"
15 条 记 录,以下是11-20 订阅
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Chip-Level Redundancy in Distributed Shared-Memory Multiprocessors
Chip-Level Redundancy in Distributed Shared-Memory Multiproc...
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Pacific Rim International Symposium on Dependable Computing
作者: Brian T. Gold Babak Falsafi James C. Hoe Computer Architecture Laboratory Carnegie Mellon University USA Sun MicroSystems Laboratories Inc. Menlo Park CA USA Parallel Systems Architecture Laboratory École Polytechnique Fédérale de Lausanne Switzerland
Distributed shared-memory (DSM) multiprocessors provide a scalable hardware platform, but lack the necessary redundancy for mainframe-level reliability and availability. Chip-level redundancy in a DSM server faces a k... 详细信息
来源: 评论
Superconducting processors for HTMT: issues and challenges
Superconducting processors for HTMT: issues and challenges
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Frontiers of Massively parallel Computation
作者: K.B. Theobald G.R. Gao T.L. Sterling Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark DE USA NASA Jet Propulsion Laboratory /Center for Advanced Computing Research California Institute of Technology Pasadena CA USA
The Hybrid Technology Multi-Threading project is a long-term study of the feasibility of combining several emerging technologies to reach 1 petaFLOPS within ten years. HTMT will combine high-speed superconductor proce... 详细信息
来源: 评论
Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions
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Cluster Computing 2001年 第4期4卷 281-293页
作者: Amaral, José Nelson Lin, Wen-Yen Gaudiot, Jean-Luc Gao, Guang R. Department of Computing Science University of Alberta Edmonton Canada Tia Mobile Inc. Pasadena USA Department of Electrical Engineering University of Southern California Los Angeles USA Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark USA
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient architecture for Runni...
来源: 评论
parallel-in-Time Multi-Level Integration of the Shallow-Water Equations on the Rotating Sphere
arXiv
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arXiv 2019年
作者: Hamon, François P. Schreiber, Martin Minion, Michael L. Center for Computational Sciences and Engineering Lawrence Berkeley National Laboratory Berkeley United States Chair of Computer Architecture and Parallel Systems Technical University of Munich Germany Department of Applied Mathematics Lawrence Berkeley National Laboratory Berkeley United States
The modeling of atmospheric processes in the context of weather and climate simulations is an important and computationally expensive challenge. The temporal integration of the underlying PDEs requires a very large nu... 详细信息
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Multi-level spectral deferred corrections scheme for the shallow water equations on the rotating sphere
arXiv
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arXiv 2018年
作者: Hamona, François P. Schreiberb, Martin Miniond, Michael L. Center for Computational Sciences and Engineering Lawrence Berkeley National Laboratory Berkeley United States Department of Mathematics/Computer Science University of Exeter Exeter United Kingdom Computer Architecture and Parallel Systems Technical University of Munich Germany Department of Applied Mathematics Lawrence Berkeley National Laboratory Berkeley United States
Effcient time integration schemes are necessary to capture the complex processes involved in atmospheric ows over long periods of time. In this work, we propose a high-order, implicit-explicit numerical scheme that co... 详细信息
来源: 评论