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检索条件"机构=Computer Architecture & Parallel Systems Laboratory"
15 条 记 录,以下是11-20 订阅
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Exploiting Locality in Single Assignment Data Structures Updated Through Split-Phase Transactions
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Cluster Computing 2001年 第4期4卷 281-293页
作者: Amaral, José Nelson Lin, Wen-Yen Gaudiot, Jean-Luc Gao, Guang R. Department of Computing Science University of Alberta Edmonton Canada Tia Mobile Inc. Pasadena USA Department of Electrical Engineering University of Southern California Los Angeles USA Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark USA
We present the design, implementation, and evaluation of single assignment data structures and of a software controlled cache in an existing multi-threaded architecture platform – the Efficient architecture for Runni...
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Design and implementation of an efficient thread partitioning algorithm  3rd
Design and implementation of an efficient thread partitionin...
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3rd International Symposium on High Performance Computing, ISHPC 2000
作者: Amaral, José Nelson Gao, Guang Kocalar, Erturk Dogan O'Neill, Patrick Tang, Xinan Computer Architecture and Parallel Systems Laboratory University of Delaware NewarkDE United States Dep. of Comp. Science Univ. of Alberta Canada
The development of fine-grain multi-threaded program ex-ecution models has created an interesting challenge: how to partition a program into threads that can exploit machine parallelism, achieve latency tolerance, and... 详细信息
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Coping with very high latencies in petaflop computer systems  2nd
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2nd International Symposium on High Performance Computing, ISHPC 1999
作者: Ryan, Sean Amaral, José N. Gao, Guang Ruiz, Zachary Marquez, Andres Theobald, Kevin Computer Architecture and Parallel Systems Laboratory University of Delaware NewarkDE United States
The very long and highly variable latencies in the deep memory hierarchy of a petaflop-scale architecture design, such as the Hybrid Technology Multi-Threaded architecture (HTMT) [13], present a new challenge to its p... 详细信息
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Superconducting processors for HTMT: issues and challenges
Superconducting processors for HTMT: issues and challenges
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Frontiers of Massively parallel Computation
作者: K.B. Theobald G.R. Gao T.L. Sterling Computer Architecture and Parallel Systems Laboratory Department of Electrical and Computer Engineering University of Delaware Newark DE USA NASA Jet Propulsion Laboratory /Center for Advanced Computing Research California Institute of Technology Pasadena CA USA
The Hybrid Technology Multi-Threading project is a long-term study of the feasibility of combining several emerging technologies to reach 1 petaFLOPS within ten years. HTMT will combine high-speed superconductor proce... 详细信息
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parallel scientific computing in promoter on the interface between application modelling and language design  98
Parallel scientific computing in promoter on the interface b...
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1998 ACM Symposium on Applied Computing, SAC 1998
作者: Besch, Matthias Heber, Gerd Wilhelmi, Matthias Parallel and Distributed Systems GMD Laboratory GMD-FIRST Rudower Chaussee 5 BerlinD-12489 Germany Computer Architecture and Parallel Systems Laboratory University of Delaware 140 Evans Hall NewarkDE19716 United States
a key issue of problem-oriented parallel programming is an appropriate concept for representing the spatial structures of an application and modelling local or global interactions operating on them. This paper advocat... 详细信息
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