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IEEE International Symposium on Performance Analysis of Systems and Software

作者： Andreas Hansson Neha Agarwal Aasheesh Kolli Thomas Wenisch Aniruddha N. Udipi Research & Development ARM Ltd Cambridge United Kingdom Advanced Computer Architecture Lab The University of Michigan Ann Arbor United States Research & Development ARM Inc. Austin United States

Compute requirements are increasing rapidly in systems ranging from mobile devices to servers. These, often massively parallel architectures, put increasing requirements on memory bandwidth and latency. The memory system greatly impacts both system performance and power, and it is key to capture the complex behaviour of the DRAM controller when evaluating CPU and GPU performance. By using full-system simulation, the interactions between the system components is captured. However, traditional DRAM controller models focus on modelling interactions between the controller and the DRAM rather than the interactions with the system. Moreover, the DRAM interactions are modelled on a cycle-by-cycle basis, leading to inflexibility and poor simulation performance. In this work, we present a high-level memory controller model, specifically designed for full-system exploration of future system architectures. Our event-based model is tailored to match a contemporary controller architecture, and captures the most important DRAM timing constraints for current and emerging DRAM interfaces, e.g. DDR3, LPDDR3 and WideIO. We show how our controller leverages the open-source gem5 simulation framework, and compare it to a state-of-the-art DRAM controller simulator. Our results show that our model is 7x faster on average, while maintaining the fidelity of the simulation. To highlight the capabilities of our model, we show that it can be used to evaluate a multi-processor memory system.

关键词： Random access memory Timing computer architecture Generators Switches Data models Bandwidth

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FANCI: Identification of stealthy malicious logic using boolean functional analysis 13

FANCI: Identification of stealthy malicious logic using bool...

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2013 ACM SIGSAC Conference on computer and Communications Security, CCS 2013

作者： Waksman, Adam Suozzo, Matthew Sethumadhavan, Simha Computer Architecture and Security Technologies Lab. Department of Computer Science Columbia University New York NY United States

ISBN: (纸本)9781450324779

Hardware design today bears similarities to software design. Often vendors buy and integrate code acquired from third-party organizations into their designs, especially in embedded/system-on-chip designs. Currently, there is no way to determine if third-party designs have built-in backdoors that can compromise security after deployment. The key observation we use to approach this problem is that hardware backdoors incorporate logic that is nearly-unused, i.e. stealthy. The wires used in stealthy backdoor circuits almost never influence the outputs of those circuits. Typically, they do so only when triggered using external inputs from an attacker. In this paper, we present FANCI, a tool that flags suspicious wires, in a design, which have the potential to be malicious. FANCI uses scalable, approximate, boolean functional analysis to detect these wires. Our examination of the TrustHub hardware backdoor benchmark suite shows that FANCI is able to flag all suspicious paths in the benchmarks that are associated with backdoors. Unlike prior work in the area, FANCI is not hindered by incomplete test suite coverage and thus is able to operate in practice without false negatives. Furthermore, FANCI reports low false positive rates: less than 1% of wires are reported as suspicious in most cases. All TrustHub designs were analyzed in a day or less. We also analyze a backdoor-free out-of-order microprocessor core to demonstrate applicability beyond benchmarks. © 2013 ACM.

关键词： Wire

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Smart sensor architectures for embedded biosignal analysis

Smart sensor architectures for embedded biosignal analysis

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2013 7th Conference on Design and architectures for Signal and Image Processing, DASIP 2013

作者： Pfundt, Benjamin Reichenbach, Marc Eskofier, Björn Fey, Dietmar Department Computer Science Computer Architecture Friedrich-Alexander-University Erlangen-Nuremberg Germany Department Computer Science Pattern Recognition Lab Friedrich-Alexander-University Erlangen-Nuremberg Germany

ISBN: (纸本)9791092279016

In many sports and medical applications small and wearable sensors are used that capture motion and physiological signals. Yet, commonly such sensor are only capable of acquiring raw data, which is afterwards transmitted to a smartphone or other mobile computing device where processing and classification is carried out. This results in limited usability because another device has to be worn. Moreover, high power consumption due to continuous transmission is a main disadvantage. Therefore, we propose a smart sensor approach that can alleviate these problems by carrying out the processing on the sensor itself. To house the processing schemes in the sensor node we developed a new computer architecture utilizing an FPGA and an ASIC. To show the benefits of the in-sensor processing, we chose two representative biosensor applications: a movement and fall detection system for the elderly and a swimming style recognition system for professional athletes. Compared to conventional approaches the same classification rate can be achieved while saving space, power, weight and setup costs.

关键词： Field programmable gate arrays (FPGA)

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A comparison of multi-objective algorithms for the automatic design space exploration of a superscalar system

Advances in Intelligent Systems and Computing

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Advances in Intelligent Systems and Computing 2013年 187 AISC卷 489-502页

作者： Calborean, Horia Jahr, Ralf Ungerer, Theo Vintan, Lucian Advanced Computer Architecture and Processing Systems Research Lab Lucian Blaga University of Sibiu E. Cioran Str. No. 4 Sibiu 550025 Romania Institute of Computer Science University of Augsburg Universitaetsstr. 6a 86159 Augsburg Germany

ISBN: (纸本)9783642325472

In today's computer architectures the design spaces are huge, thus making it very difficult to find optimal configurations. One way to cope with this problem is to use Automatic Design Space Exploration (ADSE) techniques. We developed the Framework for Automatic Design Space Exploration (FADSE) which is focused on microarchitectural optimizations. This framework includes several state-of-the art heuristic algorithms. In this paper we selected three of them, NSGA-II and SPEA2 as genetic algorithms as well as SMPSO as a particle swarm optimization, and compared their performance. As test case we optimize the parameters of the Grid ALU Processor (GAP) microarchitecture and then GAP together with the post-link code optimizer GAPtimize. An analysis of the simulation results shows a very good performance of all the three algorithms. SMPSO reveals the fastest convergence speed. A clear winner between NSGA-II and SPEA2 cannot be determined.

关键词： Heuristic algorithms

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Modeling communication in cache-coherent SMP systems - A case study with Xeon Phi

Modeling communication in cache-coherent SMP systems - A cas...

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22nd ACM International Symposium on High-Performance Parallel and Distributed Computing, HPDC 2013

作者： Ramos, Sabela Hoefler, Torsten Computer Architecture Group University of A Coruña A Coruña Spain Scalable Parallel Computing Lab. ETH Zurich Zurich Switzerland

ISBN: (纸本)9781450319102

Most multi-core and some many-core processors implement cache coherency protocols that heavily complicate the design of optimal parallel algorithms. Communication is performed implicitly by cache line transfers between cores, complicating the understanding of performance properties. We developed an intuitive performance model for cache-coherent architectures and demonstrate its use with the currently most scalable cache-coherent many-core architecture, Intel Xeon Phi. Using our model, we develop several optimal and optimized algorithms for complex parallel data exchanges. All algorithms that were developed with the model beat the performance of the highly-tuned vendor-specific Intel OpenMP and MPI libraries by up to a factor of 4.3. The model can be simplified to satisfy the tradeoff between complexity of algorithm design and accuracy. We expect that our model can serve as a vehicle for advanced algorithm design. © 2013 ACM.

关键词： Electronic data interchange

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Corrigendum to “Fast and scalable lock methods for video coding on many-core architecture” [J. Vis. Commun. Image R. 25(7) (2014) 1758–1762]

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Journal of Visual Communication and Image Representation 2015年 27卷 57-57页

作者： Weizhi Xu Hui Yu Dianjie Lu Fenglong Song Da Wang Xiaochun Ye Songwei Pei Dongrui Fan Hongtao Xie Institute of Microelectronics Tsinghua University Beijing China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China Key Lab. of Intelligent Information Processing Institute of Computing Technology Chinese Academy of Sciences Beijing China School of Information Science and Engineering Shandong Normal University Jinan China Department of Computer Science and Technology Beijing University of Chemical Technology Beijing China Institute of Information Engineering Chinese Academy of Sciences National Engineering Laboratory for Information Security Technologies Beijing China

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Corrigendum to “Fast and scalable lock methods for video coding on many-core architecture” [J. Vis. Commun. 25 (7) (2014) 1758–1762]

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Journal of Visual Communication and Image Representation 2015年 26卷 350-350页

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Towards an integrated service-oriented reference enterprise architecture

Towards an integrated service-oriented reference enterprise ...

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2013 1st International Workshop on Software Ecosystem architectures, WEA 2013

作者： Zimmermann, Alfred Sandkuhl, Kurt Pretz, Michael Falkenthal, Michael Jugel, Dierk Wissotzki, Matthias Reutlingen University Faculty of Informatics Architecture Reference Lab. Reutlingen Germany University of Rostock Faculty of Computer Science Business Information Systems Rostock Germany Daimler AG Enterprise Architecture Management SOA Innovation Lab. Stuttgart Germany

ISBN: (纸本)9781450323147

New business information systems are integrating emerging cloud infrastructures with service-oriented platforms and intelligent user-centered mobile systems. Both architecture engineering and management of service-oriented enterprise architectures is complex and has to integrate synergistic disciplines like EAM-Enterprise architecture and Management for Services & Cloud Computing, Semantic-based Decision Support through Ontologies and Knowledge-based Systems, Big Data Management, as well as Mobility and Collaboration Systems. It is necessary to identify affected decisions by runtime changes of a service-oriented runtime environment and architecture. We have to make transparent the impact of these changes over the integral landscape of affected EAM-capabilities, like directly and transitively impacted business categories, processes, applications, services, platforms and infrastructures. The paper describes a new Metamodel-based integration approach for Service-oriented Reference Enterprise architectures.

关键词： Knowledge based systems

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Unfolding - A library for interactive maps

Unfolding - A library for interactive maps

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1st International Conference on Human Factors in Computing and Informatics, SouthCHI 2013

作者： Nagel, Till Klerkx, Joris Vande Moere, Andrew Duval, Erik Interaction Design Lab. FH Potsdam Germany Department of Computer Science KU Leuven Belgium Department of Architecture Urbanism and Planning KU Leuven Belgium

ISBN: (纸本)9783642390616

Visualizing data with geo-spatial properties has become more important and prevalent due to the wide spread dissemination of devices, sensors, databases, and services with references to the physical world. Yet, with existing tools it is often difficult to create interactive geovisualizations tailored for a particular domain or a specific dataset. We present Unfolding, a library for interactive maps and data visualization. Unfolding provides an API for designers to quickly create and customize geo-visualizations. In this paper, we describe the design criteria, the development process, and the functionalities of Unfolding. We demonstrate its versatility in use through a collection of examples. Results from a user survey suggests programmers find the library easy to learn and to use. © 2013 Springer-Verlag.

关键词： Data visualization

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26th Annual Computational Neuroscience Meeting (CNS*2017): Part 1

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BMC Neurosci 2017年第SUPPL 1期18卷 58-58页

作者： Sue Denham Panayiota Poirazi Erik De Schutter Karl Friston Ho Ka Chan Thomas Nowotny Dongqi Han Sungho Hong Sophie Rosay Tanja Wernle Alessandro Treves Sarah Goethals Romain Brette Tomas Van Pottelbergh Rodolphe Sepulchre Alex D. Bird Hermann Cuntz Pedro J. Gonçalves Jan-Matthis Lueckmann Giacomo Bassetto Marcel Nonnenmacher Jakob H. Macke Audrey J. Sederberg Jason N. MacLean Stephanie E. Palmer Ulisse Ferrari Christophe Gardella Olivier Marre Thierry Mora Emina Ibrahimovic Martin Müller Jean-Pascal Pfister Tushar Chauhan Timothée Masquelier Alexandre Montlibert Benoit R. Cottereau Moritz Helias Jannis Schuecker David Dahmen Sven Goedeke Alexandre Hyafil Ainhoa Hermoso-Mendizabal Pavel E. Rueda-Orozco Santiago Jaramillo David Robbe Jaime de la Rocha Marie Rooy Fani Koukouli David DiGregorio Uwe Maskos Boris Gutkin Andrey Yu Verisokin Darya V. Verveyko Dmitry E. Postnov Willy Wong Omid Talakoub Robert Chen Milos Popovic Dmitriy Lisitsyn Eric Drebitz Iris Grothe Sunita Mandon Andreas Kreiter Udo Ernst Peter A. Robinson Xuelong Zhao Kevin M. Aquino John D. Griffiths Grishma Mehta-Pandejee Natasha Gabay James MacLaurin Somwrita Sarkar Tim Kunze Jens Haueisen Thomas R. Knösche Subutai Ahmad Yuwei Cui Marcus Lewis Jeff Hawkins Simona Olmi Spase Petkoski Fabrice Bartolomei Maxime Guye Viktor Jirsa Hazem Toutounji Daniel Durstewitz Matteo Cantarelli Adrian Quintana Boris Marin Matt Earnshaw Padraig Gleeson Robert Court Robert McDougal R. Angus Silver Salvador Dura-Bernal Stephen Larson William W. Lytton Giovanni Idili Lorenzo Posani Simona Cocco Karel Ježek Rémi Monasson School of Psychology Faculty of Health & Human Sciences Plymouth University Plymouth Devon PL4 8AA UK Institute of Molecular Biology and Biotechnology (IMBB) Foundation for Research and Technology-Hellas (FORTH) Heraklion Crete Greece Okinawa Institute of Science and Technology Graduate University Okinawa Japan Wellcome Trust Centre for Neuroimaging Institute of Neurology UCL London WC1N 3BG UK School of Engineering and Informatics University of Sussex Brighton BN1 9QJ UK Graduate School Okinawa Institute of Science and Technology Okinawa 904-0495 Japan Computational Neuroscience Unit Okinawa Institute of Science and Technology Okinawa 904-0495 Japan Cognitive Neuroscience Area Scuola Internazionale Superiore di Studi Avanzati Trieste 34136 Italy Kavli Institute for Systems Neuroscience NTNU Trondheim 7030 Norway Institut de la Vision Sorbonne Universités UPMC Univ Paris 06 INSERM CNRS Paris 75012 France Department of Engineering University of Cambridge Cambridge Cambridgeshire CB2 1PZ UK Ernst Strüngmann Institute for Neuroscience Max Planck Society Frankfurt Germany Frankfurt Institute for Advanced Studies Frankfurt Germany Neural Systems Analysis Research Center Caesar An Associate of the Max Planck Society Bonn Germany Max Planck Institute for Biological Cybernetics Tübingen Germany Bernstein Center for Computational Neuroscience Tübingen Germany Present Address: Biomedical Engineering Department Georgia Institute of Technology Atlanta GA 30306 USA Department of Neurobiology University of Chicago Chicago IL 60637 USA Department of Organismal Biology and Anatomy University of Chicago Chicago IL 60637 USA Committee on Computational Neuroscience University of Chicago Chicago IL 60637 USA Institut de la Vision Sorbonne Universités INSERM Paris France Laboratoire de Physique Statistique Ecole Normale Supérieure Paris France Institute of Molecular Life Sciences University of Zürich 8057 Zürich Switzerland Institute of Neuroinformatics Univer

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