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Roedunet International Conference (RoEduNet)

作者： Horia Calborean Lucian Vinţan Advanced Computer Architecture & Processing Systems Research Lab “Lucian Blaga” University of Sibiu Romania

ISBN: (纸本)9781424473359

During the last years, especially due to the computing systems complexity growth, the need for tools which perform automatic design space exploration becomes more and more stringent. This paper presents a new initiated project having as the main aim developing a software tool, called FADSE (Framework for Automatic Design Space Exploration), that comes to meet this need. It is intended to provide out-of-the-box algorithms capable of solving single and multiobjective optimization problems. It focuses on automatic design space exploration for multicore and manycore systems. This tool is intended to be flexible, to provide easy development and portability.

关键词： Space exploration Multicore processing Design optimization computer architecture Ant colony optimization Microarchitecture Software tools Software design Heuristic algorithms Machine learning algorithms

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Optimizing application mapping algorithms for NoCs through a unified framework

Optimizing application mapping algorithms for NoCs through a...

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Roedunet International Conference (RoEduNet)

作者： Ciprian Radu Lucian Vinţan Advanced Computer Architecture & Processing Systems Research Lab “Lucian Blaga” University of Sibiu Romania

ISBN: (纸本)9781424473359

This paper presents a preliminary PhD research towards developing a framework to evaluate and optimize application mapping algorithms for Network-on-Chip architectures. Several such algorithms have been proposed for mapping the threads of a parallel application on a NoC architecture. However, the performance of those algorithms is evaluated only on some specific NoC designs. A unified approach for evaluating such algorithms allows a better comparison of their performance and can potentially lead to some optimizations. The proposed framework is intended to be flexible so that the algorithms can be tested on different NoC designs. To this end, a scalable and flexible Network-on-Chip simulator is proposed. Some preliminary results obtained with this simulator are presented, too. They show the flexibility of this simulator and that it is feasible for addressing the application mapping problem in a unified manner.

关键词： Network-on-a-chip Algorithm design and analysis Application software Routing Tiles computer architecture Testing Network topology Design optimization

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Parametric search: three new applications

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中国高等学校学术文摘·数学 2010年第1期5卷 65-73页

作者： Naoki KATOH Wencheng WANG Yinfeng XU Binhai ZHU Department of Architecture and Architectural Engineering Kyoto University Nishikyo Kyoto 615-8540 Japan Institute of Software Chinese Academy of Sciences Beijing 100080 China School of Management Xi'an Jiaotong University State Key Lab for Manufacturing Systems Engineering Xi'an 710049 China Department of Computer Science Montana State University Bozeman MT 59717-3880 USA

Parametric search is a useful tool in geometric optimization. Invented by Nimrod Megiddo in 1983, it has been widely used in computational geometry. Unfortunately, this technique has rarely been used in the combinatorial optimization community in China. In this paper, we introduce parametric search via three new geometric optimization applications. Keywords Parametric search - geometric optimization - facility location

关键词： Parametric search geometric optimization facility location MSC

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WallBots: Interactive wall-crawling robots in the hands of public artists and political activists 10

WallBots: Interactive wall-crawling robots in the hands of p...

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Proceedings of the 8th ACM Conference on Designing Interactive Systems

作者： Kuznetsov, Stacey Paulos, Eric Gross, Mark D. Human-Computer Interaction Institute Carnegie Mellon University 5000 Forbes Avenue Pittsburgh PA United States Computational Design Lab. School of Architecture Carnegie Mellon University 5000 Forbes Avenue Pittsburgh PA United States

ISBN: (纸本)9781450301039

Street art and political activism have a rich history of shaping urban landscapes. Our work explores the processes by which public artists and political activists contribute to public spaces, introducing opportunities for HCI researchers to engage with the people who shape the aesthetic feel of our cities. We present WallBots-autonomous, wall-crawling robots as a research probe for public expression across a wide range of surfaces and hard-to-reach places, including bus stops, whiteboards, streetpoles, trashcans, moving vehicles and building walls. We evaluate WallBots as a low-cost DIY authoring tool for public artists and activists. Our study of six individuals who extensively contribute to public spaces offers insights into the materials and practices behind grassroots public expression. We then leverage feedback from participants, among them a graffiti artist, light painter, political activists, and street musician, to evaluate interaction techniques for manipulating WallBots as a medium for public expression across a range of surfaces. Our findings expose a research space for technological interventions in the context of street art, and we conclude with design insights for magnetic kinetic systems as an approach for supporting engagement, expression and creativity in public spaces. © 2010 ACM.

关键词： Autonomous agents

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Hardware/software co-design for high performance computing: Challenges and opportunities 10

Hardware/software co-design for high performance computing: ...

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Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis

作者： Hu, X. Sharon Murphy, Richard C. Dosanjh, Sudip Olukotun, Kunle Poole, Stephen Department of Computer Science and Engineering University of Notre Dame Notre Dame IN United States Scalable Computer Architecture Department Sandia National Laboratories Albuquerque NM United States Computer and Software Systems Department Sandia National Laboratories Albuquerque NM United States Department of Electrical Engineering Stanford University Stanford CA United States Computational Sciences Division Oak Ridge National Lab Oak Ridge TN United States

ISBN: (纸本)9781605589053

This special session aims to introduce to the hardware/software codesign community challenges and opportunities in designing high performance computing (HPC) systems. Though embedded system design and HPC system design have traditionally been considered as two separate areas of research, they in fact share quite some common features, especially as CMOS devices continue along their scaling trends and the HPC community hits hard power and energy limits. Understanding the similarities and differences between the design practices adopted in the two areas will help bridge the two communities and lead to design tool developments benefiting both communities.

关键词： Hardware-software codesign

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Hardware/software co-design for high performance computing: Challenges and opportunities

Hardware/software co-design for high performance computing: ...

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ISBN: (纸本)9781605589053

关键词： Hardware-software codesign

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Breaking adaptive multicast deadlock by virtual channel address/data FIFO decoupling

Breaking adaptive multicast deadlock by virtual channel addr...

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2nd International Workshop on Network on Chip architectures, NoCArc 2009, In conjunction with the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO42

作者： Keung, Ka-Ming Tyagi, Akhilesh Computer Architecture Lab. Iowa State University Ames IA 50010 United States

ISBN: (纸本)9781605587745

As computing goes to system-on-chip era, on-chip network becomes an essential infrastructure for on-chip modules (cores) communication. 2D-Mesh is the most common on-chip network topology providing high throughput point-to-point communication due to its simplicity and regularity. A well-designed 2D-Mesh wormhole router should be deadlock free while supporting multicast and adaptive routing. Unfortunately, there exists no router design providing all these characteristics concurrently. In this paper, we propose an on-chip address-data decoupled FIFO wormhole router which supports adaptive routing, native multicast and deadlock free network guarantee. For a network using a 30-flit packet, our wormhole router increases the area efficiency by 49.5% compared with a virtual cut-through router. Copyright 2009 ACM.

关键词： Routers

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A fast linear-space sequence alignment algorithm with dynamic parallelization framework

A fast linear-space sequence alignment algorithm with dynami...

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IEEE 9th International Conference on computer and Information Technology, CIT 2009

作者： Xiaochun, Ye Dongrui, Fan Wei, Lin Key Lab of Computer System and Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing China

ISBN: (纸本)9780769538365

Exact pairwise sequence alignment algorithms using dynamic programming require quadratic space and time, and this makes these algorithms impractical for large-scale sequences. In this paper, we propose and evaluate a new Anti-Diagonal based Parallel Linear-Space Algorithm (AD-PLSA). It records similarity matrix scores and start points on special anti-diagonals instead of special rows or columns. This algorithm is able to further reduce the total amount of re-computation. It also produces balanced sub-problems with approximately even size, and this is of great benefit to the parallelization. In addition, we establish a dynamic parallelization framework for the efficient acceleration on a symmetric multiprocessor (SMP) platform. The experimental results present liner speedup for long real DNA sequences. Compared with the typical row-col algorithm, our method is able to save more than 30% of the re-computation, and run twice as fast in the backward phase. © 2009 IEEE.

关键词： DNA sequences

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Implementing a high-performance multithreaded microprocessor: A case study in high-level design and validation

Implementing a high-performance multithreaded microprocessor...

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2009 7th IEEE-ACM International Conference on Formal Methods and Models for Co-Design, MEMOCODE '09

作者： Chung, Eric S. Hoe, James C. Computer Architecture Lab Carnegie Mellon University Carnegie Mellon Pittsburgh PA 15213 United States

ISBN: (纸本)9781424448067

We have developed a 16-way multithreaded microprocessor called BlueSPARC. This in-order, high-throughput processor incorporates complex features such as privileged operations, memory management, and a non-blocking cache subsystem. When supported by a hybrid simulation technique that handles rare, unimplemented behaviors in a software host, the BlueSPARC microprocessor runs unmodified UltraSPARC III-based commercial applications on Solaris 8 while hosted on a single Xilinx XCV2P70 FPGA clocked at 90MHz. This significant effort was achieved in under one man-year using a highlevel language and a high-level validation approach. In the first part of the paper, we describe our experience in applying the Bluespec SystemVerilog (BSV) language to develop a large hardware design that must meet specific area and performance requirements. In the second part of the paper, we present the FPGA-accelerated validation approach we employed to check the correct execution of real multithreaded programs running on the BlueSPARC processor. We discuss the challenges and our solutions to validation in the presence of fullsystem interactions and microarchitectural nondeterminism. © 2009 IEEE.

关键词： Field programmable gate arrays (FPGA)

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ISAR imaging of ship target based on LMSF signal

ISAR imaging of ship target based on LMSF signal

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2009 Asia-Pacific Conference on Synthetic Aperture Radar, APSAR 2009

作者： Zhang, Long Si, Dong Sen He, Wei Xing, Meng Dao State Key Lab for Radar Signal Processing Xidian University Shaanxi 710071 China Xi'an Polytechnic University Shaanxi 710048 China Institute of Computer Architecture and Networks Xi'an Jiaotong University Xi'an 710049 China

ISBN: (纸本)9781424427314

To obtain high resolution ISAR image of ship target in motion with narrow-bandwidth T/R devices and a low-speed A/D sampler, an effective imaging method based on Linearly Modulated Stepped Frequency (LMSF) is proposed in this paper. Firstly, the signal model is developed and analyzed. Secondly, a band coherent processing method is proposed to eliminated the error induced by the translational motion and the high range profile is obtained. Finally, the high resolution of cross range is achieved by using the DechirpClean techinque. The theory analysis and the resutl of real data processing demonstrate the performance of the proposed method. ©2009 IEEE.

关键词： Ships

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