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2001 IEEE International Conference on Multimedia and Expo, ICME 2001

作者： Kuo, Chin-Hwa Wible, David Chen, Meng-Chang Sung, Li-Chun Tsao, Nai-Lung Chio, Chia-Lin Computers and Networking Laboratory Department of Computer Science and Information Engineering Tamkang University Taiwan Graduate Institute of Western Languages and Literature Tamkang University Taiwan Institute of Information Science Academia Sinica Taiwan

ISBN: (纸本)0769511988

The design and implementation of an Intelligent Web-based Interactive Language Learning (IWiLL) system to support English learning on the Internet is described. We designed two kinds of learning environments: (1) interactive English writing environment and (2) mining movies for real English. These are intended to improve learners' basic language skills such as listening, reading, and writing. In addition, the system also offers authoring tools that facilitate teachers' content preparation. The system not only provides multimedia learning environments for users, but also builds a learner corpus, an archive of annotated English texts written by learners for whom English is a second language. Further analysis of the learner corpus creates the potential to detect the users' persistent errors and then provide adequate help to the users.

关键词： computer aided instruction

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The design of a Lexical Difficulty Filter for language learning on the Internet

The design of a Lexical Difficulty Filter for language learn...

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International Conference on Advanced Learning Technologies (ICALT)

作者： C.H. Kuo D. Wible C.C. Wang F.Y. Chien Computers and Networking (CAN) Laboratory Department of Computer Science and Information Engineering Tamkang University Taiwan Graduate Institute of Western Languages and Literature Tamkang University Taiwan

The authors describe the design and implementation of a tool called the Lexical Difficulty Filter (LDF) intended to help learners or teachers in selecting sentences appropriate to the level of students for English vocabulary learning. The LDF serves as a bridge between learner and information resource bank. It selects suitable sentences from the output of standard English corpus concordancers. The core technology in the design of LDF is a fuzzy expert system. The results obtained are very encouraging in this pioneering work. We achieve 94.33% accuracy rate in imitating the judgments of a human expert in determining the degree of difficulty of a sentence for a given learner level.

关键词： Information filtering Information filters Internet Vocabulary Databases Natural languages Humans Testing computer networks Laboratories

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Automating repeated exposure to target vocabulary for second language learners

Automating repeated exposure to target vocabulary for second...

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International Conference on Advanced Learning Technologies (ICALT)

作者： D. Wible Chin-Hwa Kuo Feng-yi Chien Nai Lung Taso Graduate Institute of West Languages and Literature Tamkang University Taiwan Computers and Networking (CAN) Laboratory Department of Computer Science and Information Engineering Tamkang University Taiwan

A Web-based tool is described, called the Supplementary Reading Provider (SRP), devised to find related readings according to the learners' lexical level which offer repeated exposure to the target vocabulary. The SRP exploits text retrieval techniques based upon the hypothesis that there is a parallel between text similarity measurement on the one hand and the pedagogical task of providing supplementary readings which offer repeated exposure to new vocabulary on the other. Two criteria are compared for finding supplementary passages from a corpus of reading: one matches keywords of the original passage and those of the corpus passages, the other matches target vocabulary words without regard to keywords. The integration of SRP into a Web-based language learning platform called IWiLL is described as well.

关键词： Vocabulary Natural languages Lungs computer networks Laboratories computer science Educational institutions Education Video on demand Internet

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Design and implementation of an intelligent web-based interactive language learning system

Design and implementation of an intelligent web-based intera...

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IEEE International Conference on Multimedia and Expo (ICME)

作者： Chin-Hwa Kuo D. Wible Meng-Chang Chen Li-Chun Sung Nai-Lung Tsao C.-L. Chio Computers and Networking Laboratory Department of Computer Science and Information Engineering Tamkang University Taiwan Graduate Institute of Western Languages and Literature Tamkang University Taiwan Institute of Information Science Academia Sinica Taiwan

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Evaluating register allocation and instruction scheduling techniques in out-of-order issue processors

Evaluating register allocation and instruction scheduling te...

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International Conference on Parallel architecture and Compilation Techniques (PACT)

作者： M.G. Valluri R. Govindarajan Laboratory for Computer Architecture ECE Department University of Technology Austin TX USA Supercomputer Education and Research Centre Department of Computer Science and Automation Indian Institute of Science Bangalore India

The phase ordering of register allocation and instruction scheduling in a compiler and their integration have been well studied for in-order issue and VLIW processors. In this paper we study this problem in the context of out-of-order issue processors. Such a study is interesting as the dynamic instruction ordering and register renaming support mechanisms in out-of-order issue processors are similar in spirit to what the complex register allocation and instruction scheduling techniques do at compile-time. We evaluated four existing techniques, namely postpass scheduling, prepass scheduling, parallel interference graph, and integrated prepass scheduling methods. Our initial experimental results reveal that for o-o-o issue processors the focus should be on reducing the register pressure/spill code than exposing the parallelism at compiling time.

关键词： Out of order Registers Processor scheduling VLIW Laboratories computer architecture Supercomputers computer science education computer science Automation

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The Paderborn university BSP (PUB) library-design, implementation and performance

The Paderborn university BSP (PUB) library-design, implement...

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International Symposium on Parallel Processing

作者： O. Bonorden B. Juurlink I. Von Otte I. Rieping Heinz Nixdorf Institute and Department of Computer Science Paderborn University Paderborn Germany Laboratory of Computer Architecture and Digital Techniques Department of Electrical Engineering Delft Technical University Delft Netherlands

The Paderborn University BSP (PUB) library is a parallel C library based on the BSP model. The basic library supports buffered and unbuffered asynchronous communication between any pair of processors, and a mechanism for synchronizing the processors in a barrier style. In addition, it provides routines for collective communication on arbitrary subsets of processors, partition operations, and a zero-cost synchronization mechanism. Furthermore, some techniques used in its implementation deviate significantly from the techniques used in other BSP libraries.

关键词： Libraries System recovery Costs Electrical capacitance tomography Workstations Parallel programming computer architecture Electronic mail Safety Yarn

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Definition of evaluation criteria for system development acquisition modeling and simulation

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NAVAL ENGINEERS JOURNAL 1999年第1期111卷 55-64页

作者： Leite, MJ Mensh, DR Michael J. Leite:is a Principal Engineer with PRC Inc. a division of Litton Industries. He supports combat system engineering for theater air and missile defense. His other tasks have included the command and control for the AEGIS shipbuilding program systems engineering for the 21st Century Surface Combatant combat system survivability and the development of NATO standardization agreements for naval ordnance. He was previously a Senior Engineer with San Diego Gas & Electric with responsibility for its energy application and lighting programs. Prior to joining SDG&E Mr. Leite was a commissioned officer in the U.S. Navy where he served in operations and engineering assignments. Following active duty he accepted a Naval Reserve commission and has retired with the rank of Captain. His assignments included command operational and engineering tours. Mr. Leite has also served as an expert witness in admiralty and engineering matters. He is a gradate of the University of California Berkeley with a Bachelor of Science Degree in Engineering and also holds a Masters Degree in Business Administration from National University in San Diego. Mr. Leite is a Registered Professional Engineer in the States of California and Minnesota. Mr. Leite is a member of ASNE ASCE MORS the Illuminating Engineering Society and the U.S. Naval institute. Dennis Roy Mensh:is a Senior Engineer with PRC Inc. a division of Litton Industries in Crystal City VA where he supports modeling and simulation tasking for combat systems. He received BS and MS degrees in applied Physics from Lopola College in Baltimore MD and the American University in Washington DC. He has also completed the course work towards a Ph.D. degree in computer science specializing in the fields of Operations Reseurch Anabsis Systems Analysis and Computer Modeling and Simulation. Previously he was employed at the White Oak Laboratory of the Naval Surface Warfare Carter in Silver Spring MD where he worked in the areas of naval sensor and weapon system analysis

This paper defines, develops and examines a set of generic analysis tools that can be applied to Models and Simulations at the Systems Engineering level of fidelity. The tools examine the performance and effectiveness of Sensors;Weapons;and Battle Management, Command, Control, Communications, computers, and Intelligence ((BMCI)-I-4) systems and equipment. The Measures of Performance (MOPs), Measures of Effectiveness (MOEs) and Measures of Force Effectiveness (MOFEs) were extracted from the Modular Command and Control Structure Paradigm which was developed at the Naval Postgraduate School. The paradigm provides for the development of evaluation criteria (MOPs, MOEs, and MOFEs) in a framework that ensures the traceability of system performance and effectiveness to the system operational requirements as specified in the Operational Requirements Document (ORD). Also, the analysis tools provide insight and valid estimates of numerical measures of the defined system functionality threads, which represent the system's operational requirements as specified in the ORD. The tools are directly transferrable and applicable to test and evaluation exercise events which are conducted in support of the development and acquisition of systems and equipment. Once the levels of system performance have been defined, the Paradigm generates a quantitative database that becomes a useful tool in system tradeoffs and selection. Once the alternative system suites have been defined, the suites can be analyzed in terms of system functionality threads and their corresponding performance capabilities versus cost.

关键词： Naval vessels

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FACET: PC-parallel architecture for cost-efficient telemetry processing

FACET: PC-parallel architecture for cost-efficient telemetry...

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1998 IEEE Aerospace Conference, AERO 1998

作者： El-Ghazawi, Tarek Chalermwat, Prachya Piamsa-Nga, Punpiti Ozkaya, Armagan Speciale, Nick Wilson, Donald Computer Engineering and Computer Science Florida Institute of Technology MelbourneFL312901-6975 United States Parallel Architecture Laboratory Department of Electrical Engineering and Computer Science George Washington University WashingtonDC20052 United States NASA GSFC GreenbeltMD20771 United States

ISBN: (纸本)0780343115

NASA's Mission to Planet Earth (MTPE) is planning to launch the Earth Observing System (EOS) starting in 1998. The large number of planned remote sensing satellites will bring 500 Gigabytes of information per day. The EOS Data and Information System (EOSDIS) is responsible for ingesting and archiving this data. One important component of the EOSDIS system is the data operation, which involves extracting the packets and reconstructing and archiving the original remotely sensed data products. Due to transmission errors, the way data is sampled from the different sensors encoded, packets typically arrive out of order and perhaps with some of them missing or repeated. Many special hardware solutions have been proposed to solve this real-time problem. In this paper, we demonstrate a commercial off the shelf (COTS) solution. The hardware capitalizes on the progress made in the area of network of workstations (NOW), particularly PC-clusters. The software and algorithm exploit the data characteristics and parallelism in the telemetry stream to make use of load balancing and efficient parallel processing. It is shown that this solution can provide high-performance to cost and programmability. © 1998 IEEE.

关键词： Parallel architectures

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FACET: PC-parallel architecture for cost-efficient telemetry processing

FACET: PC-parallel architecture for cost-efficient telemetry...

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IEEE Conference on Aerospace

作者： T. El-Ghazawi P. Chalermwat P. Piamsa-nga A. Ozkaya N. Speciale D. Wilson Computer Engineering and Computer Science Florida Institute of Technology Melbourne FL USA Parallel Architecture Laboratory Department of Electrical Engineering and Computer Science George Washington University Washington D.C. DC USA NASA Goddard Space Flight Center Greenbelt MD USA

关键词： Telemetry Earth Observing System Hardware Planets Remote sensing Satellites Information systems Data mining Out of order Workstations

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Identifying the capability of overlapping computation with communication

Identifying the capability of overlapping computation with c...

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International Conference on Parallel architecture and Compilation Techniques (PACT)

作者： A. Sohn J. Ku Y. Kodama M. Sato H. Sakane H. Yamana S. Sakai Y. Yamaguchi Computer and Information Science Department New Jersey Institute of Technology Newark NJ USA Computer Architecture Section Electro Technical Laboratory Tsukuba Ibaraki Japan Real World Computing Tsukuba Research Center Tsukuba Ibaraki Japan

Overlapping computation with communication is central to obtaining high performance on distributed-memory multiprocessors. This report explicates the overlapping capability of two distributed-memory multiprocessors: the EM-X and IBM SP-2. The well-known bitonic sorting algorithm is selected for experiments. Various message sizes are used to determine when, where, how much and why overlapping takes place. Experimental results indicate that both multiprocessors would yield up to 30% to 40% overlap of communication time when the message size is approximately 1K integers. EM-X is found to be message-size insensitive yielding high overlap for various message sizes, while SP-2 was effective for the window of message size 512 to 2K integers.

关键词： Delay computer architecture Switches Distributed computing High performance computing Sorting Prototypes Laboratories Yarn Windows

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