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Congress on Evolutionary Computation

作者： Ales Zamuda Janez Brest Borko Boskovic Viljem Zumer Computer Architecture and Languages Laboratory Institute of Computer Science Faculty of Electrical Engineering and Computer Science University of Maribor Maribor Slovenia

This paper presents performance assessment of differential evolution for multiobjective optimization with self adaptation algorithm, which uses the self adaptation mechanism from evolution strategies to adapt F and CR parameters of the candidate creation in DE. Results for several runs on CEC2007 special session test functions are presented and assessed with different performance metrics. Based on these metrics, algorithm strengths and weaknesses are discussed.

关键词： Chromium Measurement Evolutionary computation Genetic mutations computer science Automatic testing Simulated annealing Performance evaluation computer architecture Ground penetrating radar

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Adapting Memory Hierarchies for Emerging Datacenter Interconnects

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Journal of computer science & Technology 2015年第1期30卷 97-109页

作者：江涛侯锐董建波柴琳 Sally A. McKee 田斌张立新孙凝晖 State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China University of Chinese Academy of Sciences Beijing 100049 China Computer Science and Engineering Chalmers University of Technology Gothenburg 41296 Sweden National High Performance Integrated Circuit Design Center (Shanghai) Shanghai 201204 China

Efficient resource utilization requires that emerging datacenter interconnects support both high performance communication and efficient remote resource sharing. These goals require that the network be more tightly coupled with the CPU chips. Designing a new interconnection technology thus requires considering not only the interconnection itself, but also the design of the processors that will rely on it. In this paper, we study memory hierarchy implications for the design of high-speed datacenter interconnects particularly as they affect remote memory access -- and we use PCIe as the vehicle for our investigations. To that end, we build three complementary platforms： a PCIe-interconnected prototype server with which we measure and analyze current bottlenecks; a software simulator that lets us model microarchitectural and cache hierarchy changes; and an FPGA prototype system with a streamlined switchless customized protocol Thunder with which we study hardware optimizations outside the processor. We highlight several architectural modifications to better support remote memory access and communication, and quantify their impact and ]imitations.

关键词： high-speed interconnect memory hierarchy time shared memory datacenter network

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Balanced Quantization： An Effective and Efficient Approach toQuantized Neural Networks

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Journal of computer science & Technology 2017年第4期32卷 667-682页

作者： Shu-Chang Zhou Yu-Zhi Wang He Wen Qin-Yao He Yu-Heng Zou University of Chinese Academy of Sciences Beijing 100049 China State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China Megvii Inc. Beijing 100190 China Department of Electronic Engineering Tsinghua University Beijing 100084 China Department of Computer Science and Technology Tsinghua University Beijing 100084 China School of Electronics Engineering and Computer Science Peking University Beijing 100871 China

Quantized neural networks (QNNs), which use low bitwidth numbers for representing parameters and performing computations, have been proposed to reduce the computation complexity, storage size and memory usage. In QNNs, parameters and activations are uniformly quantized, such that the multiplications and additions can be accelerated by bitwise operations. However, distributions of parameters in neural networks are often imbalanced, such that the uniform quantization determined from extremal values may underutilize available bitwidth. In this paper, we propose a novel quantization method that can ensure the balance of distributions of quantized values. Our method first recursively partitions the parameters by percentiles into balanced bins, and then applies uniform quantization. We also introduce computationally cheaper approximations of percentiles to reduce the computation overhead introduced. Overall, our method improves the prediction accuracies of QNNs without introducing extra computation during inference, has negligible impact on training speed, and is applicable to both convolutional neural networks and recurrent neural networks. Experiments on standard datasets including ImageNet and Penn Treebank confirm the effectiveness of our method. On ImageNet, the top-5 error rate of our 4-bit quantized GoogLeNet model is 12.7%, which is superior to the state-of-the-arts of QNNs.

关键词： quantized neural network percentile histogram equalization uniform quantization

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Software Defect Prediction via Deep Belief Network

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Chinese Journal of Electronics 2019年第5期28卷 925-932页

作者： WEI Hua SHAN Chun HU Changzhen ZHANG Yu YU Xiao School of Computer Science and Technology Beijing Institute of Technology China Information Technology Security Evaluation Center Beijing Key Laboratory of Software Security Engineering Technology Beijing Institute of Technology School of Electrical and Information Engineering and Beijing Key Laboratory of Intelligent Processing for Building Big Data Beijing University of Civil Engineering and Architecture State Key Laboratory in China for Geomechanics and Deep Underground Engineering (Beijing) China University of Mining and Technology School of Computer Science and Technology Shandong University of Technology

Defect distribution prediction is a meaningful topic because software defects are the fundamental cause of many attacks and data loss. Building accurate prediction models can help developers find bugs and prioritize their testing efforts. Previous researches focus on exploring different machine learning algorithms based on the features that encode the characteristics of *** problem of data redundancy exists in software defect data set, which has great influence on prediction *** propose a defect distribution prediction model(Deep belief network prediction model, DBNPM), a system for detecting whether a program module contains defects. The key insight of DBNPM is Deep belief network(DBN)technology, which is an effective deep learning technique in image processing and natural language processing,whose features are similar to defects in source *** results show that DBNPM can efficiently extract and process the data characteristics of source program and the performance is better than Support vector machine(SVM), Locally linear embedding SVM(LLE-SVM), and Neighborhood preserving embedding SVM(NPE-SVM).

关键词： Defect prediction Software security Deep belief network(DBN)

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An enhanced QoS decomposition approach for efficient service composition

An enhanced QoS decomposition approach for efficient service...

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International Conference on computer science and Education

作者： Jin, Jun Zhang, Yu Cao, Yuanda Zhou, Ruitao Beijing Laboratory of Intelligent Information Technology School of Computer Science Beijing Institute of Technology Beijing China School of Computer Science Beijing University of Civil Engineering and Architecture Beijing China

ISBN: (纸本)9781424460052

For each service class, there exist many alternative web services that provide the same functionality and different quality parameters, to find an optimal composition, most service selection approach in decentralized environment enumerate all possible combinations of service candidates. However, with the growing number of alternative services, those approaches will achieve a poor performance. To improve the performance, in this paper we proposed a QoS decomposition approach, that divide the global constraints into separate ones for each involved service class. With the separate constraints, each service class engages in service selection independently and simultaneously. Moreover, besides sequential pattern our approach also supports parallel pattern. Experimental results indicate that our approach performs efficiently and can achieve near-optimal solutions. ©2010 IEEE.

关键词： Quality of service

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Improving latency tolerance of network processors through simultaneous multithreading

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6th International Workshop on Advanced Parallel Processing Technologies, APPT 2005

作者： Liang, Bo An, Hong Lu, Fang Guo, Rui Department of Computer Science and Technology University of Science and Technology of China Hefei 230026 China Computer Architecture Laboratory Institute of Computing Technology Chinese Academy of Sciences Beijing 100086 China

ISBN: (纸本)3540296395

Existing multithreaded network processors architecture with multiple processing engines (PEs), aims at taking advantage of blocked multithreading technique which executes instructions of different user-defined threads in the same PE pipeline, in explicit and interleave way. Multiple PEs, each of which is a multithreaded processor core, process several packets in parallel to hide long memory access latency. Most of them are optimized for throughputs mostly in data-plane. In future network workloads, the boundaries between data-plane and control-plane become blurred, so that PEs are demanded not only wire speed packet forwarding on data-plane, but also highly intelligent and increased complex packet processing function on control-plane. In this paper, we analyze SMT's short latency tolerance potential when used in out-of-order and dynamic scheduling PE cores. We show in this paper that 2-4 issue SMT provides an excellent short memory and branch latency tolerance, which gain higher instructions throughout as well as much simpler structures. © Springer-Verlag Berlin Heidelberg 2005.

关键词： Network protocols

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History and grouping based probabilistic routing in DTNs

History and grouping based probabilistic routing in DTNs

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International Conference on computer science and Education

作者： Zhou, Ruitao Zhang, Yu Cao, Yuanda Jin, Jun Beijing Laboratory of Intelligent Information Technology School of Computer Science Beijing Institute of Technology Beijing China School of Computer Science Beijing University of Civil Engineering and Architecture Beijing China

ISBN: (纸本)9781424460052

Delay and Tolerant Networks (DTNs) have been proposed to address data communication challenges in network scenarios, where no instantaneous end-to-end path is guaranteed because of frequent and long duration network partitions. Typical protocols forward a message to multiple nodes to improve message delivery rate. However, a large number of replications of original messages consume a large amount of system resources that are quite limited in such scenarios. History and Grouping based Probabilistic Routing (HGPR) is proposed in this paper to reduce the number of replications by limiting the range of message "infection" of Epidemic. Nodes are divided into different groups, and the "epidemic" only happens within certain groups. History contacts information is used for group selecting in HGPR. Simulation results show that HGPR performs better than both Epidemic and PROPHET in the community scenario, and it outperforms G-Epidemic in some metrics. ©2010 IEEE.

关键词： Delay tolerant networks

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H-DB: Yet another big data hybrid system of Hadoop and DBMS

H-DB: Yet another big data hybrid system of Hadoop and DBMS

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13th International Conference on Algorithms and architectures for Parallel Processing, ICA3PP 2013

作者： Luo, Tao Chen, Guoliang Zhang, Yunquan School of Computer Science and Technology University of Science and Technology of China 230027 Hefei China State Key Laboratory of Computer Architecture Institute of Computing Technology CAS 100190 Beijing China

ISBN: (纸本)9783319038582

With the explosion of the amount of data, analytics applications require much higher performance and scalability. However, traditional DBMS encounters the tough obstacle of scalability, and could not handle big data easily. In the meantime, due to the complex relational data model, the large amount of historical data and the independent demand of subsystems, it is not suitable to use either shared-nothing MPP architecture (e.g. Hadoop) or existing hybrid architecture (e.g. HadoopDB) to replace completely. In this paper, considering the feasibility and versatility of building a hybrid system, we propose a novel prototype H-DB which takes DBMSs as the underlying storage and execution units, and Hadoop as an index layer and a cache. H-DB not only retains the analytical DBMS, but also could handle the demands of rapidly exploding data applications. The experiments show that H-DB meets the demand, outperforms original system and would be appropriate for analogous big data applications. © Springer International Publishing Switzerland 2013.

关键词： Database systems

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TSCMR:Two-Stage Cross-Modal Retrieval 9th

TSCMR:Two-Stage Cross-Modal Retrieval

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19th International Conference on Advanced Data Mining and Applications, ADMA 2023

作者： Chen, Zhihao Wang, Hongya School of Computer Science and Technology Donghua University Shanghai China State Key Laboratory of Computer Architecture Institute of Computing Technology CAS Beijing China Shanghai Key Laboratory of Computer Software Evaluating and Testing Shanghai China

ISBN: (纸本)9783031466731

Currently, large-scale vision and language models has significantly improved the performances of cross-modal retrieval tasks. However, large-scale models require a substantial amount of computing resources, so the execution of these models on devices with limited resources is challenging. Thus, it is paramount to reduce the model size and minimize computing costs of a model without sacrificing its performance. In this paper, we improved TERAN by dividing cross-modal retrieval into two stages: image-text coarse-grained matching and image-text fine-grained matching. Specifically, we present a novel approach called Two-Stage Cross-Modal Retrieval network(TSCMR). To reduce model size after model training, our approach utilized a new knowledge distillation method for Transformer-based models. Experiments have shown that our approach maintains a performance comparable to TERAN on the MS-COCO 1K test set, while being 2x smaller and 3.1x faster on inference. © The Author(s), under exclusive license to Springer Nature Switzerland AG 2023.

关键词： Distillation

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A Pipelining Loop Optimization Method for Dataflow architecture

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Journal of computer science & Technology 2018年第1期33卷 116-130页

作者： Xu Tan Xiao-Chun Ye Xiao-Wei Shen Yuan-Chao Xu Da Wang Lunkai Zhang Wen-Ming Li Dong-Rui Fan Zhi-Min Tang State Key Laboratory of Computer Architecture Institute of Computing Technology Chinese Academy of Sciences Beijing 100190 China School of Computer and Control Engineering University of Chinese Academy of Sciences Beijing 1000J9 China State Key Laboratory of Mathematical Engineering and Advanced Computing Wuxi 214125 China College of Information Engineering Capital Normal University Beijing 100048 China Department of Computer Science The University of Chicago Chicago IL 60637 U.S.A.

With the coming of exascale supercomputing era, power efficiency has become the most important obstacle to build an exascale system. Dataflow architecture has native advantage in achieving high power efficiency for scientific applications. However, the state-of-the-art dataflow architectures fail to exploit high parallelism for loop processing. To address this issue, we propose a pipelining loop optimization method （PLO）, which makes iterations in loops flow in the processing element （PE） array of dataflow accelerator. This method consists of two techniques, architecture-assisted hardware iteration and instruction-assisted software iteration. In hardware iteration execution model, an on-chip loop controller is designed to generate loop indexes, reducing the complexity of computing kernel and laying a good f（mndation for pipelining execution. In software iteration execution model, additional loop instructions are presented to solve the iteration dependency problem. Via these two techniques, the average number of instructions ready to execute per cycle is increased to keep floating-point unit busy. Simulation results show that our proposed method outperforms static and dynamic loop execution model in floating-point efficiency by 2.45x and 1.1x on average, respectively, while the hardware cost of these two techniques is acceptable.

关键词： dataflow model control-flow model loop optimization exascale computing scientific application

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