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CLOCK SYNCHRONIZATION ON THE FACTORY FLOOR

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS 1988年第3期35卷 372-380页

作者： GORA, W HERZOG, U TRIPATHI, SK Computer Architecture and Performance Evaluation University of Erlangen Nuremberg Germany System Research Center UMIACS and the Department of Computer Science University of Maryland College Park MD USA

The coordination of flexible manufacturing systems (FMS) in an automated factory requires that synchronization amongst the manufacturing processes be based on a common clock. The synchronization requirements on the factory floor are described, and several clock synchronization algorithms, their theoretical bounds, and the results of the authors' work are discussed. Measurement results based on the implementation of such synchronization algorithms on local area networks (LAN) are presented. For hierarchical LANs, an algorithm is developed and its behavior simulated.< >

关键词： Clocks Synchronization Production facilities Flexible manufacturing systems computer aided manufacturing Manufacturing automation Control systems Protocols Automatic control Production systems

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Constructive modelling and design basic research within the European QMIPS-project 5

Constructive modelling and design basic research within the ...

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5th International Workshop on Petri Nets and performance Models, PNPM 1993

作者： Herzog, U. Friedrich-Alexander Univ. Erlangen-Nuremberg Department for Computer Architecture and Performance Evaluation Germany

ISBN: (纸本)0818642505

The main objectives of the Quantitative Modelling in Parallel Systems (QMIPS) project, a research activity on quantitative modeling of parallel and distributed systems, are summarized. Elements of a constructive modeling and design methodology are discussed, and stochastic process algebras are emphasized as an interesting base for it. © 1993 IEEE.

关键词： Stochastic systems

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performance evaluation PRINCIPLES FOR VECTOR AND MULTIPROCESSOR SYSTEMS

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PARALLEL COMPUTING 1988年第3期7卷 425-438页

作者： HERZOG, U Institute for Mathematical Machines and Data Processing Friedrich-Alexander-University Erlangen-Nürnberg Chair for Computer Architecture and Performance Evaluation D-8520 Erlangen Fed. Rep. Germany

Skilful computer system measurement, modelling and performance evaluation techniques are needed for supercomputer architectures. They allow to accurately determine characteristics performance values, to find potential hardware- and software-bottleneck; they also help to efficiently distribute and schedule user tasks. This paper is an extended version of a tutorial contribution at the IEEE CompEuro 87 and surveys fundamental performance issues and their solution for supercomputer architectures.

关键词： Vector computer multiprocessor systems performance measures monitoring techniques modelling memory interference modelling synchronization problems

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The method of moments for higher moments and the usefulness of formula manipulation systems 8th

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8th International Conference on Modelling Techniques and Tools for computer performance evaluation, performance Tools 1995 and 8th GI/ITG Conference on Measuring, Modelling and Evaluating Computing and Communication Systems, MMB 1995

作者： Paterok, Martin Dauphin, Peter Herzog, Ulrich IBM European Networking Center Heidelberg Germany University of Erlangen-Nümberg Institute for Mathematical Machines and Data Processing VII Chair for Computer Architecture and Performance Evaluation Germany

ISBN: (纸本)9783540603009

Though often not explicitly stated, the method of moments is one of the heavily used methods in queueing analysis. By tracing a typical, tagged customer as it proceeds through the system expected values for a wide range of systems, especially single server systems with Poisson arrivals, have been obtained in the last decades. This paper investigates the suitability of the method of moments to derive higher moments. Starting from general considerations, the problems in dealing with higher moments are insulated, and solutions are presented. These results give a deep insight into the nature of the method of moments. It is difficult to handle the complex formulae for higher moments without the help of a formula manipulation system such as SCRATCHPAD . The tool was particularly useful to make first steps to find hypothetical formulae, then start proof (e.g. by induction) and to perform complex derivations, e.g. for comparison. The use of the tool gives deep insight into the potential use of computer algebra systems for queueing analysis. © Springer-Verlag Berlin Heidelberg 1995.

关键词： Method of moments

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Schedulability analysis of heterogeneous systems for performance message sequence chart

Schedulability analysis of heterogeneous systems for perform...

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International Workshop on Hardware/Software Codesign (CODES)

作者： F. Slomka J. Zant L. Lambert Department of Computer Architecture and Performance Evaluation University of Erlangen Nuremberg Erlangen Germany

Telecommunication systems are often specified in the standardized languages SDL and MSC. These languages allow only the specification of pure functional aspects. To remedy this problem we have combined the language MSC and performance aspects in performance MSC (PMSC). From a PMSC specification a task model can be derived that includes beside computation times, periods and deadlines of tasks, also absolute start times of tasks and dependencies between task. This allows us to apply an extended schedulability analysis of asynchronous tasks on heterogeneous target architectures. We present the analysis technique and demonstrate with a small example, how the algorithm can be used for the real-time analysis of a cordless telephone.

关键词： performance analysis Timing Hardware Processor scheduling computer architecture Costs Tellurium Formal specifications Protocols Automata

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A scalable hardware library for the rapid prototyping of SDL specifications

A scalable hardware library for the rapid prototyping of SDL...

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International Workshop on Rapid System Prototyping (RSP)

作者： M. Dorfel F. Slomka R. Hofmann Department of Computer Architecture and Performance Evaluation University of Erlangen Nuremberg Erlangen Germany

A known problem in the area of hardware/software codesign is the selection of the proper interface between the different parts of the design. This paper presents a technique which eases the selection by combining different synthesis techniques together with rapid prototyping. The application field of the technique is the design of communication systems where C and VHDL are generated from a specification given in SDL. For the VHDL area, high-level synthesis is used to synthesize a behavioural description.

关键词： Hardware Prototypes Signal processing Protocols Software libraries Software prototyping computer architecture Software performance Diversity reception Application software

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A prototyping system for high performance communication systems

A prototyping system for high performance communication syst...

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International Workshop on Rapid System Prototyping (RSP)

作者： M. Dorfel R. Hofmann Department of Computer Architecture and Performance Evaluation University of Erlangen Nuremberg Erlangen Germany

Presents a prototyping platform for high-performance communication systems together with a design methodology. Based on a formal design entry and nonfunctional design goals such as execution time and overall system cost, a software/hardware partitioning is generated and its performance is estimated with formal models. Valid partitionings are then implemented on a prototyping platform which is based on a heterogeneous multiprocessor system and a reconfigurable FPGA board. Using model-based optimization and monitoring, each partitioning is evaluated and the results are fed back in the generation and estimation of new partitionings.

关键词： Prototypes Software prototyping Design methodology Costs Software performance Software systems Hardware Multiprocessing systems Field programmable gate arrays Monitoring

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Constructive modelling and design basic research within the European QMIPS-project

Constructive modelling and design basic research within the ...

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International Workshop on Petri Nets and performance Models (PNPM)

作者： U. Herzog Chair for Computer Architecture and Performance Evaluation Friedrich-Alexander-University of Erlangen-Nuremberg Germany

关键词： Stochastic processes Algebra Petri nets computer architecture Design methodology computer science Queueing analysis Algorithm design and analysis Electronic mail Process design

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Schedulability analysis of heterogeneous systems for performance message sequence chart 98

Schedulability analysis of heterogeneous systems for perform...

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Proceedings of the 6th international workshop on Hardware/software codesign

作者： Frank Slomka Jürgen Zant Lennard Lambert University of Erlangen-Nuremberg Department of Computer Architecture and Performance Evaluation Martensstr. 3 91058 Erlangen Germany

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Mixed abstraction level hardware synthesis from SDL for rapid prototyping

Mixed abstraction level hardware synthesis from SDL for rapi...

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International Workshop on Rapid System Prototyping (RSP)

作者： O. Bringmann A. Muth F. Slomka W. Rosenstiel G. Farber R. Hofmann Wilhelm-Schickard-Institut für Informatik Department of Computer Engineering Universität Tubingen Germany Laboratory for Process Control and Real-Time Systems Technische Universitä MTünchen Germany Department of Computer Architecture and Performance Evaluation Universität Erlangen Nürnberg Germany

SDL is currently gaining interest as a system level specification language for HW/SW codesign. Automated synthesis of SDL in hardware so far had problems with its efficiency. The investigations on the resource usage of SDL-to-VHDL designs presented in this paper identify two key challenges: minimizing the overhead introduced by SDL process infrastructure, and choosing the appropriate synthesis method. This paper presents a framework for SDL hardware synthesis where VHDL code generation, high-level synthesis and RT-level synthesis are combined. A configurable run-time environment implements services like data handling and message passing in efficient, hand-coded library components, which take into account properties of the target architecture. For these components RT-level synthesis was found to be suitable. The behavior of each SDL process on the other hand is freely specified by the system designer. Depending on the type of application, i.e. complex data-oriented or control-oriented either high-level synthesis, RT-level synthesis, or a combination of both can prove to be optimal.

关键词： Hardware Prototypes Control system synthesis Timing High level synthesis computer architecture Resource management Arithmetic High performance computing Design engineering

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