Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. Many two-port memories have ports which are read-only or wri...
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Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests have to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible tests for single-port and two-port memories, as well as the test strategy. This paper discusses the consequences of the port restrictions (read-only or write-only ports) on the tests; in addition it covers the test strategy for address decoder faults in two-port memories.
In array radar signal processing applications, the processing demands range from tens of GFLOPS to several TFLOPS. To address this, as well as the, size and power dissipation issues, a special purpose "array sign...
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In array radar signal processing applications, the processing demands range from tens of GFLOPS to several TFLOPS. To address this, as well as the, size and power dissipation issues, a special purpose "array signal processing" architecture is proposed. We argue that a combined MIMD-SIMD system can give flexibility, scalability, and programmability as well as high computing density. The MIMD system level, where SIMD modules are interconnected by a fiber-optic real-time network, provides the high level flexibility while the SIMD module level provides the compute density. In this paper we evaluate different design alternatives and show how the VEGA architecture was derived. By examining the applications and the algorithms used, the SIMD mesh processor is found be sufficient. However, the smaller the meshes are the better is the flexibility and efficiency. Then, based on prototype VLSI implementations and on instruction statistics, we find that a relatively large pipelined processing element maximises the performance per area. It is thereby concluded that the small SIMD mesh processor array with powerful processing elements is the best choice. These observations are further exploited in the design of the single-chip SIMD processor array to be included in the MIMD-style overall system. The system scales from 6.4 GFLOPS to several TFLOPS peak performance.
Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-on...
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Testing two-port memories requires the use of single-port tests as well as special two-port tests; the test strategy determines which tests to be used. Many two-port memories have ports which are read-only or write-only; this impacts the possible fault models, the tests for single-port and two-port memories, as well as the test strategy. This paper presents a test strategy for two-port memories and covers the consequences of the port restrictions (read-only or write-only ports).
NASA's Mission to Planet Earth (MTPE) is planning to launch the Earth Observing System (EOS) starting in 1998. The large number of planned remote sensing satellites will bring 500 Gigabytes of information per day....
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NASA's Mission to Planet Earth (MTPE) is planning to launch the Earth Observing System (EOS) starting in 1998. The large number of planned remote sensing satellites will bring 500 Gigabytes of information per day. The EOS Data and Information System (EOSDIS) is responsible for ingesting and archiving this data. One important component of the EOSDIS system is the data operation, which involves extracting the packets and reconstructing and archiving the original remotely sensed data products. Due to transmission errors, the way data is sampled from the different sensors encoded, packets typically arrive out of order and perhaps with some of them missing or repeated. Many special hardware solutions have been proposed to solve this real-time problem. In this paper, we demonstrate a commercial off the shelf (COTS) solution. The hardware capitalizes on the progress made in the area of network of workstations (NOW), particularly PC-clusters. The software and algorithm exploit the data characteristics and parallelism in the telemetry stream to make use of load balancing and efficient parallel processing. It is shown that this solution can provide high-performance to cost and programmability.
A multstatic frequency-modulated continuous wave (FMCW) radar system is under development for use in the control system of autonomous vehicles. The aim of the system, named Colarado, is the 3D location of obstacles in...
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A multstatic frequency-modulated continuous wave (FMCW) radar system is under development for use in the control system of autonomous vehicles. The aim of the system, named Colarado, is the 3D location of obstacles in the surrounding environment. In this paper a laboratory prototype system version, the demonstrator, is described and current results are presented.
Short and efficient memory tests is the goal of every test designer. To reduce the cost of production tests, often a simple test which covers most of the faults, e.g. all simple (unlinked) faults, is desirable to elim...
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Short and efficient memory tests is the goal of every test designer. To reduce the cost of production tests, often a simple test which covers most of the faults, e.g. all simple (unlinked) faults, is desirable to eliminate most defective parts;a more costly test can be used thereafter to eliminate the remainder of the bad parts. Such a test-cost efficient approach is used by most manufacturers. In addition, system power-on tests are not allowed a long test time while a high fault coverage is desirable. The authors propose a new realistic fault model (the disturb fault model), and a set of tests for unlinked faults. These tests have the property of covering all simple (unlinked) faults at a very reasonable test time compared with existing tests.
In recent years, high performance computing underwent a deep transformation. In this paper, we review the state of parallel computation with detailed discussion of the current and future research issues in the area of...
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In recent years, high performance computing underwent a deep transformation. In this paper, we review the state of parallel computation with detailed discussion of the current and future research issues in the area of parallel architectures and compilation methods, instruction level parallelism and optimization methods to improve the performance of the memory hierarchy.
To optimize the performance and reduce the emission levels of an internal combustion engine one needs some measurements of the combustion process duality. We propose two artificial neural network models which use the ...
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To optimize the performance and reduce the emission levels of an internal combustion engine one needs some measurements of the combustion process duality. We propose two artificial neural network models which use the ionization current for estimation of the position of the pressure peak and the air-fuel ratio. The pressure peak position model produces estimates on a cycle-by-cycle basis for each of the cylinders. These estimates are twice as good as estimates obtained from a linear model. The air-fuel ratio model uses the universal exhaust gas oxygen sensor as reference; it produces estimates that are ten times better than estimates obtained from a linear model.
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