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检索条件"机构=Computer Architecture and Technology Group"

共 351 条记录，以下是261-270 订阅

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GPU vs FPGA: Example Application on White Light Interferometry

GPU vs FPGA: Example Application on White Light Interferomet...

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International Conference on Reconfigurable Computing and FPGAs (ReConFig)

作者： A. Pacholik M. Muller W. Fengler T. Machleidt K.-H. Franke Computer Architecture and Embedded Systems Group Ilmenau University of Technology Ilmenau Germany Computer Graphics Group Ilmenau University of Technology Ilmenau Germany

High performance image processing applications area challenging field when targeting embedded processing. Field programmable gate arrays (FPGA) receive a growing interest as implementation platforms, but these solutions have to compete with the state of the art in image processing, which is codefined by graphics processing units (GPU). This paper provides a case study which analyzes the potential of embedded or hybrid implementation on FPGA and GPU for image stack processing in a white light interferometry (WLI) application.

关键词： Graphics processing unit Field programmable gate arrays Demodulation Image resolution Bandwidth Throughput Hardware

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LiSARD: LabVIEW Integrated Softcore architecture for Reconfigurable Devices

LiSARD: LabVIEW Integrated Softcore Architecture for Reconfi...

引用

International Conference on Reconfigurable Computing and FPGAs (ReConFig)

作者： A. Pacholik J. Klockner M. Muller I. Gushchina W. Fengler Computer Architecture and Embedded Systems Group Ilmenau University of Technology Ilmenau Germany

The development of industrial control and measurement systems is often based on modular commercial off the-shelf hardware. Lately, for these platforms reconfigurable I/O modules with field-programmable gate arrays (FPGA) have gained significance, since they allow the implementation of data processing functionality very close to the data acquisition interfaces. However, algorithm complexity and floating-point support are limited by FGPA resources and design methods. This contribution presents an application specific configurable DSP soft core architecture built around a scalable double precision floating-point arithmetic/logic unit. The core can be seamlessly utilized as a functional component in Lab VIEW based FPGA designs. A small case study shows the performance of an example application implemented on the presented core in comparison to other embedded architectures.

关键词： Field programmable gate arrays computer architecture Registers Hardware Pipelines Algorithm design and analysis Program processors

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Custom instruction hardware integration within a SoC hybrid environment

Custom instruction hardware integration within a SoC hybrid ...

引用

International Symposium on Applied Computational Intelligence and Informatics ( SACI)

作者： Jonathan Parri Miodrag Bolic Voicu Groza School of Information Technology and Engineering Computer Architecture Research Group University of Ottawa Canada

Traditionally, common processor augmentation solutions have involved the addition of coprocessors or the datapath integration of custom instructions within extensible processors as Instruction Set Extensions (ISE). Rarely is the hybrid option of using both techniques explored. Much research already exists concerning the identification and selection of custom hardware blocks from hardware/software partitioning techniques, but the question of how to best use this hardware within a user system where both coprocessors and datapath augmentations are possible remains. This paper looks to extend existing ISE algorithms which provide custom hardware as dataflow graphs (DFG) and place them appropriately within a hybrid System-on-Chip (SoC) using standard combinatorial optimization techniques. A combinatorial model is presented to address this placement issue and is applied to two well known kernel programs. We further show that such standard techniques can execute within a reasonable time frame alleviating the need for heuristics.

关键词： Hardware Coprocessors Registers System-on-a-chip Generators Delay computer architecture

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ASIPs for artificial neural networks

ASIPs for artificial neural networks

引用

International Symposium on Applied Computational Intelligence and Informatics ( SACI)

作者： Daniel Shapiro Jonathan Parri John-Marc Desmarais Voicu Groza Miodrag Bolic School of Information Technology and Engineering Computer Architecture Research Group University of Ottawa Canada

Customized application-specific processors called ASIPs are becoming commonplace in contemporary embedded system designs. Neural networks are an interesting application for which an ASIP can be tailored to increase performance, lower power consumption and/or increase throughput. Here, both the bidirectional associative memory and hopfield auto-associative memory networks are run through an automated instruction-set identification algorithm to identify and select custom instruction candidates suitable for neural network applications. Clusters of neural networks are highly parallel, and therefore it is interesting to consider a homogeneous multiprocessor composed of ASIPs. The two legacy neural network applications showed a 18-120% improvement with the automatic hardware/software partitioning for a uniprocessor ASIP. However, due to pointers and function calling which did not resolve to hardware, the acceleration was concentrated in the network initialization part of the code.

关键词： Artificial neural networks Hardware Program processors Acceleration Biological neural networks Neurons

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Towards dependability-aware design of hardware systems using extended program state machines

Towards dependability-aware design of hardware systems using...

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2011 14th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, ISORCW 2011

作者： Grüttner, Kim Herrholz, Andreas Kühne, Ulrich Große, Daniel Rettberg, Achim Nebel, Wolfgang Drechsler, Rolf OFFIS - Institute for Information Technology HW/SW Design Methodology Group Oldenburg Germany CoSynth GmbH and Co. KG Oldenburg Germany LSV ENS de Cachan Cachan France University of Bremen Group for Computer Architecture Bremen Germany Carl Von Ossietzky University Oldenburg Embedded Hardware/Software Systems Oldenburg Germany

ISBN: (纸本)9780769543772

Due to the continuous shrinking of the transistor sizes which is strongly driven by Moore's law, reliability becomes a dominant design challenge for embedded systems. Reliability problems arise from permanent errors due to manufacturing, process variations, aging as well as soft errors. As a result, the hardware will consist of unreliable components and hence, the development of embedded systems has to change fundamentally. Therefore, we propose a dependability-aware design approach for hardware systems through integrating dependability into a state-of-the-art system-level design language. Our approach is based on SystemC and extends the Program State Machine model to explicitly observe, diagnose, and compensate faulty behavior. Different compensation mechanisms like run-time reconfiguration or mechanisms for error propagation can be used by the designer during refinement. They are controlled by a new exception-like mechanism. Furthermore, our approach aims to integrate functional verification as well as dependability verification with respect to given fault models. © 2011 IEEE.

关键词： Embedded systems

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Ensuring privacy in a Distributed Video Coding surveillance scenario

Ensuring privacy in a Distributed Video Coding surveillance ...

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1st IEEE International Conference on Consumer Electronics - Berlin, ICCE-Berlin 2011

作者： Martínez, J.L. Villalón, J.M. Parreño, J.H. Cuenca, P. Kalva, H. Architecture and Technology of Computing Systems Group Complutense University Ciudad Universitaria s/n 28040 Madrid Spain University of Castilla-La Mancha Campus Universitario 02071 Albacete Spain Department of Computer Science and Engineering Florida Atlantic University 777 Glades Rd Boca Raton FL 34341 United States

ISBN: (纸本)9781457702341

In this paper, a permutation scheme is introduced for Distributed Video Coding. The main goal is to preserve privacy and security in video surveillance video communications and can be adapted for other scenarios. The proposed approach consists to apply permutation based encryption to the DVC scenario. The permutation is defined by a secret key which is required at the decoder for decompression providing security. Simulation results show that the reference architecture and the permutation-based proposed have similar rate distortion performance. © 2011 IEEE.

关键词： Cryptography

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A framework for early stage quality-fault tolerance analysis of embedded control systems

A framework for early stage quality-fault tolerance analysis...

引用

International Conference on Dependable Systems and Networks (DSN)

作者： S. G. Vadlamudi P. P. Chakrabarti Dipankar Das Purnendu Sinha Department of Computer Science and Engineering Indian Institute of Technology Kharagpur Kharagpur India Electrical and Software Architecture Group General Motors India Science Laboratory Bangalore India

This work presents a static-analysis based method for analyzing the robustness of a given embedded control system design, in the presence of quality-faults in sensors, software components, and inter-connections. The method characterizes the individual components of the system by storing the relations between the precision of inputs and the precision of outputs in what we call, lookup tables (LUTs). A network of LUTs thus formed which represent the given control system is converted into a satisfiability modulo theory (SMT) instance, such that a satisfying assignment corresponds to a potential counterexample (the set of quality-faults which violate the given fault-tolerance requirements) or hot-spot in the design. Hot-spots obtained in this manner are counter-verified through simulation to filter the false-positives. Experimental results on the fault-tolerant fuel controller from Simulink automotive library demonstrate the efficacy of the proposed approach.

关键词： Sensors Degradation Fault tolerant systems Noise Fault tolerance Trajectory Table lookup

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An Interdisciplinary Approach to Designing Adaptive Lighting Environments

An Interdisciplinary Approach to Designing Adaptive Lighting...

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International Conference on Intelligent Environments (IE)

作者： Remco Magielse Philip Ross Sunder Rao Tanir Ozcelebi Paola Jaramillo Oliver Amft Designing Quality in Interaction (DQI) Group Department of Industrial Design Intelligent Lighting Institute (ILI) Eindhoven University of Technology Eindhoven Netherlands System Architecture and Networks (SAN) Group Department of Mathematics and Computer Science Intelligent Lighting Institute (ILI) Eindhoven University of Technology Eindhoven Netherlands Signal Processing Systems (SPS) Group Department of Electrical Engineering Intelligent Lighting Institute (ILI) Eindhoven University of Technology Eindhoven Netherlands

Due to advancements in lighting technologies new opportunities for application emerge. In this paper an interdisciplinary study towards the development of adaptive lighting environments is presented. An implementation of an adaptive lighting environment is made in the domain of office work. For evaluation, experts from the domains of human-system interaction, activity and context recognition, and system architecture design are interviewed. Contributions are made with regard to the implementation of the adaptive lighting in office environments and an evaluation method that is in line with the interdisciplinary approach. From the evaluation method insights in the fields of human-computer interaction, activity and context recognition and system architecture and (wireless) networking and in topics that span across these fields are gained.

关键词： Indexes

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Towards Dependability-Aware Design of Hardware Systems Using Extended Program State Machines

Towards Dependability-Aware Design of Hardware Systems Using...

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IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops (ISORCW)

作者： Kim Gruttner Andreas Herrholz Ulrich Kuhne Daniel Grosse Achim Rettberg Wolfgang Nebel Rolf Drechsler HW/SW Design Methodology Group OFFIS Institute of Information Technology Oldenburg Germany CoSynth GmbH and Company KG Oldenburg Germany LSV ENS de Cachan Cachan France Group for Computer Architecture University of Brethemen Bremen Germany Embedded Hardware/Software Systems Carl von Ossietzky University슠of슠Oldenburg Oldenburg Germany

关键词： Computational modeling Hardware Circuit faults computer architecture Fault tolerance Switches Adaptation model

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Ensuring privacy in a Distributed Video Coding surveillance scenario

Ensuring privacy in a Distributed Video Coding surveillance ...

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IEEE International Conference on Consumer Electronics - Berlin (ICCE-Berlin)

作者： J. L. Martínez J.M. Villalón J.H. Parreño P. Cuenca H. Kalva Architecture and Technology of Computing Systems Group Complutense University Ciudad Universitaria s/n Madrid SPAIN Instituto de Investigacion en Informatica de Albacete (I3A) Campus Universitario Albacete SPAIN Department of Computer Science and Engineering Florida Atlantic University FL USA

关键词： Encryption Privacy Decoding Correlation Bit rate

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