检索结果-内蒙古大学图书馆

ASME International Solar Energy Conference - Solar Engineering 2006

作者： Greden, Lara V. López-Betanzos, Gabriel Glicksman, Leon R. Weidt Group 5800 Baker Road Minnetonka MN 55345 United States Massachusetts Institute of Technology Department of Computer Science and Electrical Engineering 77 Massachusetts Avenue Cambridge MA 02139 United States Massachusetts Institute of Technology Building Technology Department of Architecture 77 Massachusetts Avenue Cambridge MA 02139 United States

ISBN: (纸本)089553178X

Performance uncertainty is a barrier to implementation of innovative technologies. This research investigates the potential of flexible design - one that enables future change - to improve the economic performance of a naturally ventilated building. The flexible design of the naturally ventilated building enables future installation of a mechanical cooling system by including features such as space for pipes and chillers. The benefits of the flexible design are energy savings, delay of capital costs and capability of mitigating the risk of a failed building (by installing the mechanical cooling system). To evaluate the flexible design, building energy simulation is conducted over a multi-year time period with stochastic outdoor temperature variables. One result is a probability distribution of the time when the maximum allowable indoor temperature under natural ventilation is exceeded, which may be "never." Probability distributions are also obtained for energy savings and cost savings as compared to a mechanically cooled building. Together, these results allow decision-makers to evaluate the long-term performance risks and opportunities afforded by a flexible implementation strategy for natural ventilation. It is shown that the likelihood of future installation of mechanical cooling is most sensitive to design parameters. The impact of increased climate variability depends on the local climate. The probability of installing the mechanical system also depends on the comfort criteria. The results show that capital costs for cooling equipment are much greater than the present value of 10 years of cooling energy costs. This result motivates consideration of flexible design as opposed to hybrid cooling designs (which have immediate installation of mechanical cooling). Future work will study the impact of uncertain energy prices on investment attractiveness of naturally ventilated buildings. Other applications of the framework presented herein include replacing the build

关键词： Risk management

来源：评论

学校读者我要写书评

暂无评论

A Distributed Supervisor Synthesis Approach Based on Weak Bisimulation

A Distributed Supervisor Synthesis Approach Based on Weak Bi...

引用

International Workshop on Discrete Event Systems, WODES

作者： Rong Su J.G. Thistle System Architecture and Networking Group (SAN) in Department of Mathematics and Computer Science Eindhovan University of Technology Eindhoven Netherlands Department of Electrical and Computer Engineering University of Waterloo Waterloo ONT Canada

It is well known that space and time complexity is one of the main bottlenecks of supervisor synthesis. The model of a large system is usually too big to be explicitly expressed, owing to composition of local components' models, making supervisor synthesis difficult, if still possible. In this paper, we propose a distributed supervisor synthesis approach, where instead of computing a model of the entire system, a local abstraction of the system with respect to each local component is computed based on weak bisimulation. Then a local supervisor for each component is computed based on the component model and the abstract system model, by using well developed centralized supervisor synthesis approaches. The collection of all resulting local supervisors forms a distributed supervisor

关键词： Distributed computing Control system synthesis Automata Centralized control Control theory Computational complexity Encoding Data structures Boolean functions Network synthesis

来源：评论

学校读者我要写书评

暂无评论

Transparent management of reconfigurable hardware in embedded operating systems

Transparent management of reconfigurable hardware in embedde...

引用

IEEE computer Society Annual Symposium on VLSI

作者： K. Kociuszkiewicz F. Morgan K. Kepa Dept. of Electron. Eng. Ireland Nat. Univ. Galway Ireland Electronic Engineering Department National University of Ireland Galway Computer Architecture Group Wroclaw University of Technology Poland

A reconfigurable system-on-chip (rSoC) architecture incorporating embedded uClinux operating system and multiple co-processing nodes has been reported (Williams and Bergmann, 2004). Our paper extends this platform to incorporate transparent management of reconfigurable hardware resources. This provides a convenient and flexible means for rapid application development of rSoC systems. The co-processor allocation and task management system is described. Details of the implementation are also included

关键词： Hardware Operating systems Application software Coprocessors computer architecture Pipelines Parallel processing Kernel technology management Engineering management

来源：评论

学校读者我要写书评

暂无评论

Overview of research and development on seamless networking technologies

引用

Journal of the National Institute of Information and Communications technology 2006年第4期53卷 91-100页

作者： Morikawa, Hiroyuki Inoue, Masugi Hasegaw, Mikio Murakami, Homare Mahmud, Khaled Ryoki, Nobuo Pyo, Chang Woo Tran, Ha Nguyen Minami, Masateru Teraoka, Fumio Department of Frontier Informatics Graduate School of Frontier Sciences University of Tokyo Ubiquitous Mobile Communications Group New Generation Wireless Communications Research Center North South University Bangladesh Department of Electronic Engineering Faculty of Engineering Shibaura Institute of Technology Network Architecture Group New Generation Network Research Center Kyushu Research Center Collaborative Research Management Group Department of Information and Computer Science Faculty of Science and Technology Keio University

National Institute of Information and Communications technology of Japan (NICT) completed a project on new-generation mobile communications networks for beyond 3G or 4G in March 2006. This paper presents our vision of new-generation mobile communications networks from networking perspective and their capabilities to be offered: fast and large-capacity handover, cross-network handover, cross-device handover, and interworking between real and cyber worlds. Then, Metro Mobile Ring network technology for the first capability, MIRAI architecture for the second and third capabilities, and other works are presented.

关键词： Research and development management

来源：评论

学校读者我要写书评

暂无评论

FPGA implementations of the massively parallel GCA model

FPGA implementations of the massively parallel GCA model

引用

19th IEEE International Parallel and Distributed Processing Symposium, IPDPS 2005

作者： Heenes, Wolfgang Hoffmann, Rolf Kanthak, Sebastian Darmstadt University of Technology Computer Architecture Group Hochschulstrasse 10 D-64289 Darmstadt

ISBN: (纸本)0769523129

The GCA (Global Cellular Automata) model is a very interesting and flexible model which can be used to implement all kind of parallel algorithms. The GCA model consists of a field of cells similar the Cellular Automata model. Each cell has links to a set of remote cells which can be dynamically changed from generation to generation. A cell reads the remote neighbors' states and then changes its own state according to a local rule. The model is massively parallel because all cells can change their states independently and in parallel. We have investigated how the GCA model can be implemented efficiently in hardware using a Field Programmable Gate Array (FPGA) prototyping platform. We have implemented a fully parallel architecture where all cells operate fully in parallel and other architectures where the cells are stored in memories in order to handle a large number of cells. We are showing that in the fully parallel architecture a speed-up of around 190 is realistic on a modern FPGA platform compared to a software implementation on a PC. In the partially parallel architecture based on memories the speed-up will be lower but the number of cells is only restricted by the capacity of the memories.

关键词： Parallel processing systems

来源：评论

学校读者我要写书评

暂无评论

FPGA implementations of the massively parallel GCA model

FPGA implementations of the massively parallel GCA model

引用

International Symposium on Parallel and Distributed Processing (IPDPS)

作者： W. Heenes R. Hoffmann S. Kanthak Computer Architecture Group Darmstadt University of Technology Darmstadt Germany

The GCA (global cellular automata) model is a very interesting and flexible model which can be used to implement all kind of parallel algorithms. The GCA model consists of afield of cells similar the cellular automata model. Each cell has links to a set of remote cells which can be dynamically changed from generation to generation. A cell reads the remote neighbors' states and then changes its own state according to a local rule. The model is massively parallel because all cells can change their states independently and in parallel. We have investigated how the GCA model can be implemented efficiently in hardware using a field-programmable gate array (FPGA) prototyping platform. We have implemented a fully parallel architecture where all cells operate fully in parallel and other architectures where the cells are stored in memories in order to handle a large number of cells. We are showing that in the fully parallel architecture a speed-up of around 190 is realistic on a modern FPGA platform compared to a software implementation on a PC. In the partially parallel architecture based on memories the speed-up will be lower but the number of cells is only restricted by the capacity of the memories.

关键词： Field programmable gate arrays computer architecture Hardware Parallel architectures Biological system modeling Parallel algorithms Programmable logic arrays Prototypes Hydrodynamics Biomedical optical imaging

来源：评论

学校读者我要写书评

暂无评论

Uncomputability of Supremal Local Supports in Distributed Diagnosis

Uncomputability of Supremal Local Supports in Distributed Di...

引用

IEEE Conference on Decision and Control

作者： J.G. Thistle R. Su Department of Electrical and Computer Engineering University of Waterloo Waterloo ONT Canada Architecture and Networking Group (SAN) in Department of Mathematics and Computer Science Eindhovan University of Technology Eindhoven Netherlands

In distributed diagnosis it may be useful to achieve local consistency among local estimates. For that purpose the Computational Procedure for Local Consistency (CPLC) was proposed to achieve the supremal local support, which represents one type of local consistency. It has been shown that if CPLC terminates then the result is in fact the supremal local support. However, in this paper it is shown that, even if all initial estimates are regular languages, the termination of CPLC is undecidable. Moreover, these difficulties are not confined to this specific procedure: it is undecidable whether the supremal local support corresponding to an arbitrary collection of regular initial languages is componentwise empty; consequently, the supremal local support is effectively uncomputable.

关键词： Belief propagation Fault diagnosis Scalability Computational complexity Discrete event systems Formal languages Councils computer architecture Storage area networks Mathematics

来源：评论

学校读者我要写书评

暂无评论

Load unbalance in k-ary n-cube networks

引用

10th International European Conference on Parallel Processing, Euro-Par 2004

作者： Miguel-Alonso, J. Gregorio, J.A. Puente, V. Vallejo, F. Beivide, R. The University of the Basque Country Department of Computer Architecture and Technology P.O. Box 649 San Sebastián20080 Spain University of Cantabria Computer Architecture Group ETSIIT Av. de Los Castros s/n Santander39005 Spain

ISBN: (纸本)3540229248

This paper studies the effect that HOL (Head-of-Line) blocking in the packet injection queue has on the performance of bidirectional k-ary ncubes, for values of k over a certain threshold (around 20). The HOL blocking causes an unbalanced use of the channels corresponding to the two directions of bidirectional links, which is responsible for a drop in the network throughput and a rise in the network delay. Simulation results show that this anomaly only appears in those rings where most injections are performed (normally, those in the X axis), and that the elimination of the HOL blocking in the injection queue enables the network to sustain peak throughput after saturation. © Springer-Verlag Berlin Heidelberg 2004.

关键词： computers

来源：评论

学校读者我要写书评

暂无评论

Identifying untestable transition faults in latch based designs with multiple clocks

Identifying untestable transition faults in latch based desi...

引用

IEEE International Test Conference

作者： M. Syal S. Chakravarty M.S. Hsiao Bradley Department of Electrical and Computer Engineering Virginia Technology Blacksburg VA USA Intel Architecture Group Intel Corporation Santa Clara CA USA

This work presents a novel technique to identify functionally untestable transition faults in latch based designs with multiple clock domains, bringing to light unaddressed issues related to untestable fault identification in such design environments. We also introduce and provide a solution to a new variant of un-testability analysis wherein "architectural constraints'' are absorbed during the analysis. We give our tool the capability of handling transition faults resulting from defects of varying sizes, and evaluate our tool for various industrial circuits. The proposed algorithm is compared with a state-of-the-art sequential ATPG tool, and our method has shown much better performance both in the context of scan ATPG and functional test development. Results indicate that the proposed technique identifies considerably more untestable transition faults than those that can be deduced from the knowledge of untestable stuck-at faults. Additional insights from our results point to a greater need to eliminate untestable transition faults as compared to stuck-at faults, for more efficient test pattern generation and accurate coverage computation.

关键词： Fault diagnosis Clocks Circuit faults Delay Fault detection Latches Circuit testing Automatic test pattern generation Flip-flops computer architecture

来源：评论

学校读者我要写书评

暂无评论

Remembrance of data passed: A study of disk sanitization practices

引用

IEEE Security and Privacy 2003年第1期1卷 17-27页

作者： Garfinkel, Simson L. Shelat, Abhi Massachusetts Inst. of Technology Cryptography/Info. Security Group Advanced Network Architecture Group MIT's Lab. for Computer Science Theory of Computation Group Massachusetts Inst. of Technology

The disk sanitization practices are studied. computer systems used by people with varying authorization levels typically employ authentication, access control lists, and a privileged operating system to maintain information privacy. The study indicates that the secondary hard-disk market is almost certainly awash in information that is both sensitive and confidential. If sanitization practices are not significantly improved, it is only a matter of time before the confidential information on repurposed hard drives is exploited by individuals and organizations that would do us harm.

关键词： Security of data

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：