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22nd Annual Workshop on Microprogramming and Microarchitecture, MICRO 1989

作者： Mulder, Hans Portier, Robert J. Section Digital Systems and Computer Architecture Department of Electrical Engineering Delft University of Technology P.O. Box 5031 Delft2600 GA Netherlands

ISBN: (纸本)0897913248

Increasing the performance of application-specific processors by exploiting application-resident parallelism is often prohibited by costs;especially in the case of low-volume productions. The flexibility of horizontal-microcoded machines allows these costs to be reduced, but the flexibility often reduces efficiency. VLIW is a new and promising concept for the design of low-cost, high-performance parallel computer systems. We suggest that the VLIW concept can also be used as a basis for cost-effective design of application-specific processors which must exploit application-resident parallelism. The SCARCE (SCalable architecture Experiment) framework, an approach for cost-effective design of application-specific processors, provides features which allow the design of retargetable VLIW architectures. However, a retargetable VLIW architecture is only effective if there is a retargetable VLIW compiler. Since a VLIW compiler is an essential part of the VLIW architecture, tradeoffs must be made between the variety of VLIW architectures and the compiler complexity. We suggest that limiting the flexibility of the retargetable VLIW architecture does not necessary reduce the application space. This paper discusses the issues related to the design of a retargetable VLIW processor architecture and compiler within the SCARCE framework. © 1990 ACM.

关键词： Very long instruction word architecture

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DOAS: An object oriented architecture supporting secure languages 22

DOAS: An object oriented architecture supporting secure lang...

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22nd Annual Workshop on Microprogramming and Microarchitecture, MICRO 1989

作者： Van De Goor, A.J. Corporaal, H. Section Digital Systems and Computer Architecture Faculty of Electrical Engineering Delft University of Technology Mekelweg 4 P.O. Box 5031 Delft2600 AG Netherlands

ISBN: (纸本)0897913248

Current software engineering practice heavily relies on the reliability of software implementation languages and underlying architectures. However, both the currently used languages, as well as the traditional architectures suffer from a shortage of built-in security. In this paper, an architecture is presented, which is heavily influenced by two properties of secure languages: coercion and exception handling. It is shown that proper design decisions lead to an architecture having a compact data representation, allowing both generic and nongeneric instructions. The architecture is object oriented, and object addressing is under control of the operand stream, with optimalisation possibilities to bypass descriptor inspection. © 1990 ACM.

关键词： Object oriented programming

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An architecture framework for application-specific and scalable architectures 89

An architecture framework for application-specific and scala...

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Proceedings of the 16th annual international symposium on computer architecture

作者： J. M. Mulder R. J. Portier A. Srivastava R. in't Velt Section Digital Systelns and Computer Architecture Department of Electrical Engineering Delft University of Technology POBox 5031260O AG Delft The Netherlands

ISBN: (纸本)9780897913195

Two major limitations concerning the design of cost-effective application-specific architectures are the recurrent costs of system-software development and hardware implementation, in particular VLSI implementation, for each *** SCalable architecture Experiment (SCARCE) aims to provide a framework for application-specific processor design. The framework allows scaling of functionality, implementation complexity, and performance. The SCARCE framework consists and will consist of: an architecture framework defining the constraints for the design of application-specific architectures; tools for synthesizing architectures from application or application-area; VLSI cell libraries and tools for quick generation of application-specific processors; a system-software platform which can be retargeted quickly to fit the application-specific architecture;This paper concentrates primarily on the architecture framework of SCARCE, but also presents briefly some software issues and outlines the process of generating VLSI processors.

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Efficient macro-code emulation in hardwired pipelined processors 21

Efficient macro-code emulation in hardwired pipelined proces...

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Proceedings of the 21st annual workshop on Microprogramming and microarchitecture

作者： J. M. Mulder R. J. Portier A. Srivastava R. in't Velt Section Digital Systems and Computer Architecture Department of Electrical Engineering Delft University of Technology POBox 5031 2600 AG Delft The Netherlands

ISBN: (纸本)9780818619199

Traditionally microcoded computers have been the ideal machines for implementing scalable architectures. These machines easily implement application-specific functionality in microcode and they allow architecturally transparent variation of cost/performance by trading off application code, microcode, and hardware. In contrast, hardwired machines are intrinsically incapable of implementing scalability, because they only implement a single level of interpretation. Recent RISC designs have introduced architectural features which partly resolve the scalability issues. They implement architectural openendness to allow application-specific functionality to be added to the architecture (by means of coprocessors and special function units). Additionally they define functions which, depending on application, cost, and performance, can be implemented in hardware or, by means of emulation, in *** identical from an abstract point of view, scalability by means of microprogramming and by means of emulation on a hardwired machine is significantly different. This paper describes the emulation facility provided in SCARCE (SCalable architecture Experiment), a streamlined architecture specifically designed for a wide range of embedded applications, requiring high performance. While architecturally transparent, this emulation facility operates with little overhead (8 cycles), adds three control registers, and is always interruptible. By increasing the hardware investment, the overhead could be decreased to 4 cycles per trap.

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AIR-CUSHION LANDING CRAFT NAVIGATION

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NAVAL ENGINEERS JOURNAL 1985年第4期97卷 248-260页

作者： GRAHAM, HR KIM, JC BAND, EGU FOWLER, AW Herbert R. Graham:received his degrees of B.S. in 1951 and M.S. in 1958 in aeronautical engineering from the Massachusetts Institute of Technology and the California Institute of Technology respectively. He also attended the Harvard Graduate School of Business Administration. He is presently a task manager at TRW Inc. McLean Virginia responsible for landing craft air cushion (LCAC) engineering support. Since joining TRW in 1967 he has had several technical project management and system engineering responsibilities in amphibious ships transportation and energy. He was responsible for the preliminary engineering design and cost estimates for tracked air cushion vehicles (TACVs). He has been active in several professional societies including ASNE and served as vice-chairman Los Angeles Section American Institute of Aeronautics and Astronautics. John C. Kim:received his degrees of B.S. in electrical engineering Tri-State University 1959 M.S. in electrical engineering Michigan State University 1960 and Ph.D. in electrical engineering Michigan State University. He is presently a senior staff engineer with TRW Inc. McLean Virginia where his technical experience has included communications system engineering and navigation system analysis. Since joining TRW in 1969 he has held numerous positions including section head project manager and department manager. His previous employment includes E-Systems/Melpar Division and Honeywell. Dr. Kim has been active in the IEEE Washington Chapter activities which included secretary vice-chairman and chairman of Systems Science and Cybernetics Group. Edward G.U. Band:received a B.S. degree in mechnical engineering in 1946 and a D.I.C in aeronautical engineering in 1947 at the City and Guilds College of London University. In 1951 he received an M.S. degree from Stevens Institute of Technology in fluid dynamics. After a career in the aircraft industry in England Canada and the U.S.A. he spent several years teaching in Chile and at Webb Institute of Naval Archi

Air cushion vehicles (ACVs) have operated successfully on commercial routes for about twenty years. The routes are normally quite short; the craft are equipped with radar and radio navigation aids and maintain continuous contact with their terminals. Navigation of these craft, therefore, does not present any unusual difficulty. The introduction of air cushion vehicles into military service, however, can present a very different picture, especially when external navigation aids are not available and the craft must navigate by dead reckoning. This paper considers the problems involved when navigating a high-speed air cushion vehicle by dead reckoning in conditions of poor visibility. A method is presented to assess the ACV's navigational capability under these circumstances. A figure of merit is used to determine the sensitivity of factors which affect navigation such as the range of visibility, point-to-point distance, speed, turning radius and accuracy of onboard equipment. The method provides simplistic but adequate answers and can be used effectively to compare the-capability and cost of alternative navigation concepts.

关键词： AIR CUSHION VEHICLES

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ENERGY CONSIDERATIONS STUDY ON NAVAL SHIP FUEL CONSUMPTION VARIATIONS

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NAVAL ENGINEERS JOURNAL 1981年第2期93卷 47-57页

作者： SLAGER, JJ TOMASSONI, CA SANDBERG, WC THE AUTHORS: Mr. John S. Slager:is currently the Director of Hydrodynamic Design at Designers & Planners (D&P) Inc. Arlington Va. He received his B.S. degree from Webb Institute of Naval Architecture in 1949 and from then until 1964 was employed as Naval Architect and Supervisory Naval Architect in the Preliminary Design Branch of the Navy's Bureau of Ships where he was involved in Feasibility Conceptual and Preliminary Design studies for all types of Navy Surface Ships and Submarines. From 1964 to 1980 he was employed as Principal Naval Architect at Hydronautics Inc. where he continued to be involved in early-stage design work primarily naval ships. In recent years he has concentrated on improvement of ship hydrodynamic performance and has been involved in the development and definition of the hull forms as well as the power performance predictions for many recent naval ship designs. In 1980 he joined D&P where his responsibilities include management of and participation in ship hydrodynamic studies and participation in the early-stage design of all types of ships. Mr. Slager is a member of RINA and SNA ME. Mr. Carlos A. Tomassoni:is Director of Ship Design and Marine Economics at D&P. He received his M.S. degree in Naval Architecture and Marine Engineering from the University of Buenos Aires in 1962 and began his career as a Naval Architect in the largest naval shipyard in his native country. In 1965 he joined the firm of John J. McMullen Associates in New York City as Project Engineer. He also worked as a Senior Naval Architect for the Advanced Marine Technology Division of Litton Industries during the design of the DD 963 Class ships and most recently for Hydronautics Inc. where he reached the position of Head Naval Architecture Division. In his current capacity at D&P he is responsible for early-stage ship design work and marine economic activities for both commercial and naval ships. He is particularly experienced in the development and use of ship design synthesis computer programs used

Speed-power margins are applied during the preparation of powering performance estimates for new U.S. Navy ship designs. This paper describes a study which was carried out in support of the U.S. Navy's Energy Conservation Program. The primary purpose of the study was to estimate, for new naval ships, the savings in ship fuel consumption and ship acquisition costs which might be achieved by the use of design power margin values which are smaller than those in the current NAVSEA margin policy. A second, related purpose was to determine the risks, in terms of reduced probabilities of achieving design speed, which would be associated with the use of reduced power margin values. The results of the study indicate that reductions in fuel consumption and acquisition cost can be achieved if a projected new naval ship is redesigned with a smaller value of power margin. However, the results are shown to be dependent upon ship size constraints and on the type of propulsion system. The results of the study also indicate that, for a projected new naval ship, the use of a reduced design power margin value will be accompanied by a substantial decrease in the probability of achieving the design speed.

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An image processing approach to computer graphics

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computers and Graphics 1977年第2期2卷 111-117页

作者： Entwisle, Jeffrey The Architecture Machine Group This work is in part funded by the Computer Applications in Research Section Office of Computing Activities National Science Foundation (NSF grant No. GJ40501) in part by the Office of Naval Research Department of Navy (ONR grant No. N00014-67-A-204-0074) and in part by the IBM Corporation. Department of Architecture. Massachusettes Institute of Technology. Cambridge. MA 02139 U.S.A.

computer graphics was conceived as, and remains for the most part, a line-drawing phenomenon. The cautious management of display lists or of in-line vector generators has captured most of the attention of researchers in computer graphics. Cathode ray tubes with randomly positionable beams have served as the primary medium for this research and development. The underlying position of this paper is that the future of computer graphics does not lie in 'vectored' displays but in raster scan television, conceivably as we know it in our homes. This posture is motivated by arguments of cost and compatibility, but the most salient motivation comes in view of the ubiquitous nature of raster scan display technologies. This paper explains a way to implement an image processing approach to computer graphics, one that is conceptually straightforward and, in terms of hardware, fairly easy to design. A device is being built that encompases as much as is known about raster scan, multi-bit per point displays. The work described is conducted, principally, to produce a multi-bit per point graphics output device that dynamically shares its image storage with the memory space of an expanded mini-computer. © 1977.

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ARGE SHALLOW DRAFT BULK CARRIER technology ASSESSMENT

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Naval Engineers Journal 1976年第5期88卷 35-42页

作者： BAKI, AMOS CHRISTENSEN, ROBERT G. Mr. Amos Baki:Manager of Ship Design and Marine Economics. Washington D.C. Branch M. Rosenblatt & Son Inc. since 1973 graduated from the University of Stratclyde Glasgow Scotland in 1966 receiving his BS degree in Naval Architecture and subsequent thereto took graduate studies in Business Administration (Finance & Economics) at Temple University in 1971. In his present position he is responsible for the technical and administrative supervision of conceptual feasibility contract and detail design tasks including direct liaison with clients and subcontractors preparation of proposals cost estimates and research work in ship and shipping economics. In this capacity one of his many technical assignments has been as Assistant Project Manager and Leading Research Engineer on the Maritime Administration's “Large Shallow Draft Bulk Carrier Technology Assessment.” Prior to joining M. Rosenblatt & Son Inc. he was employed at Litton Ship Systems (1971–73) as Chief of the Ship System Economic Section at Sun Shipbuilding & Drydock Co. (1968–71) as Senior Research Engineer and at Furness Shipbuilding Co. Ltd. in England (1966–68) as a Computer Section Leader. In addition to ASNE he is a member of SNAME and an associate member of the Royal Institute of Naval Architecture. Mr. Robert G. Christensen:Program Manager for Market Analysis Office of Marine Technology U.S. Maritime Administration was born in New Orleans La. in 1941. He graduated from Louisiana State University in 1964 receiving his BS degree as a major in Mathematics and Business and later attended American University from which he received his MS degree in Operations Research and R&D Management in 1973. A licensed Purser in the Merchant Marine Service he has been employed by the Maritime Administration since 1967 and in his present position is responsible for assisting U.S. shipbuilders and ship operators in the definition of market requirements and the assessment of market opportunities. In this his principal efforts have been concentra

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A SYSTEMS APPROACH TO HULL STRUCTURE DESIGN

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NAVAL ENGINEERS JOURNAL 1970年第5期82卷 59-&页

作者： RAWAT, P who began his education in his native India received a Bachelor of Technology degree with honors from the Indian Institute of Technology in 1957. His subsequent education includes S. M.‘s in Industrial Management and Naval Architecture & Marine Engineering from M. I. T. in 1961 and a professional degree in Naval Architecture from the same institution in 1965. Rawat's career began as a Naval Architect in preliminary design with the Hamburg firm of Howladtswerke in 1958. A year later he performed as a research assistant in M. I. T.'s School of Industrial Management for a Ford Foundation Project for a top management training program for India. After this two-year period he acted as the head of the Department Head of Engineering at the Ghana Nautical College in West Africa until 1963. He returned to M. I. T. afterwards to work as a research assistant in Naval Architecture on structural optimization programs. From 1965 to 1966 he filled the capacity of Naval Architecture with M. Rosenblatt & Son in the area of structural design on such projects as MOHOLE AGOR 14 and Catamaran Hull. Since 1966 Rawat has been working in various capacities with Litton Industries: Senior Naval Architect on the FDL Project Section Manager of Hull Structures for the LHA and DD Projects and his present position as Section Manager for Computer Aided Ship Design.

Many useful conclusions can be drawn if hull structural design is considered as a system. Proper definition of system objectives enables setting up of meaningful long range and intermediate goals. Current state-of-art in systems engineering is such that the system objectives can be denned in mathematical form. This provides meaningful scales for progress measurement. The engineering function is to meet the goals set by systems engineering. The state-of-art in engineering has a considerable impact on the definition of system objectives. In recent times we have made considerable progress in developing analytical techniques. Many interesting conclusions result from our experience in using the analytical tools in an iterative manner for design. By using relatively simple algorithms for iteration the analytical processes can be sequenced in such a manner that optimum solution is guaranteed even under a large and complex set of design constraints. Use of computers makes it possible to generate the scantlings using iterative approach with such speed that many important structural configuration decisions can be made by means of thorough parametric analyses. The system objectives therefore are very different in scope today and they should be further modified as technology advances. There are several problems that can be recognized and solved in the systems context. Smooth man-machine operation is an example of this.

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