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2017 IEEE Manchester PowerTech, Powertech 2017

作者： Homan, Bart Smit, Gerard J.M. Van Leeuwen, Richard P. Ten Kortenaar, Marnix V. Ten, B.V. Computer Architectures and Embedded Systems University of Twente Enschede Netherlands Departmetn of Renewable Energy Saxion University of Applied Sciences Enschede Netherlands Wezep Netherlands

ISBN: (纸本)9781509042371

In this paper the relatively simple model for State of Charge prediction, based on energy conservation, introduced in [1] is improved and verified. The model as introduced in [1] is verified for Pb-acid, Li-ion and Seasalt batteries. The model is further improved to accommodate the rate capacity effect and the capacity recovery effect, the improvements are verified with lead-acid batteries. For further verification the model is applied on a realistic situation and compared to measurements on the behavior of a real battery in that situation. Furthermore the results are compared to results of the well-established KiBaM model. Predictions on the SoC over time done using the proposed model closely follow the SoC over time calculated from measured data. The resulting improved model is both simple and effective, making it specially useful as part of smart control, and energy usage simulations. © 2017 IEEE.

关键词： Forecasting

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Sampling Jitter mitigation in latency-critical state-estimation applications using particle filters

Sampling Jitter mitigation in latency-critical state-estimat...

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SICE International Symposium on Control systems (ISCS)

作者： Viktorio S. El Hakim Marco J.G. Bekooij Department of Embedded Software and Signal Processing NXP Semiconductors Eindhoven The Netherlands Department of Computer Architectures for Embedded Systems University of Twente Enschede The Netherlands

ISBN: (纸本)9781509056149

State estimation algorithms, such as the Kalman filter, are applied for conditioning and sensor fusion in digital control loops. It is desirable that these algorithms can be executed on embedded multiprocessor systems. However this results in large worst-case execution times with a consequence that a large sampling period must selected, which degrades the estimation and control performance. In this paper, we propose a free-running state-estimation approach in which the next sample is taken as soon as the current iteration completes. The approach utilizes the particle filter algorithm to mitigate the effects of sampling jitter, introduced by the variation in the execution times of tasks. As a result of the reduced interval between subsequent sampling moments the estimation accuracy is improved. The delay introduced by the estimator in a control loop is reduced by enabling execution of the prediction step in parallel with other control tasks. We compare simulation results obtained for our approach with a Kalman filter based approach, by estimating the state of a DC motor. These results show that our approach minimizes the estimation error, as a result of sampling jitter, by up to a factor of 10. Additionally we show that the approach does not require precise knowledge of the distribution of the execution times of the tasks.

关键词： Jitter Schedules Delays State estimation Signal processing algorithms

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Validation of a predictive model for smart control of electrical energy storage

Validation of a predictive model for smart control of electr...

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IEEE International Energy Conference and Exhibition (EnergyCon)

作者： Bart Homan Gerard J.M. Smit Richard P. van Leeuwen Lei Zhu Jan B. de Wit Computer Architectures and Embedded Systems University of Twente Enschede The Netherlands Saxion University of Applied Sciences Enschede The Netherlands

ISBN: (纸本)9781467384643

The purpose of this paper is to investigate the applicability of a relatively simple model which is based on energy conservation for model predictions as part of smart control of thermal and electric storage. The paper reviews commonly used predictive models. Model predictions of charging and discharging cycles are compared with experimental data of a domestic hot water thermal storage and lead acid batteries.

关键词： Batteries State of charge Mathematical model Discharges (electric) Predictive models Computational modeling

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UniTi: Unified composition and time for multi-domain model-based design

UniTi: Unified composition and time for multi-domain model-b...

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作者： Rovers, Kenneth C. Kuper, Jan Computer Architectures for Embedded Systems Group Faculty of Electrical Engineering Math and Computer Science University of Twente Enschede Netherlands

To apply model-based design to embedded systems that interface with the physical world, including simulation and verification, current tools fall short. They must provide mathematical (model) definitions that stay close to the specification of the system. They must allow multiple domains, such as the continuous-time, discrete-time and dataflow domain, in a single model including well-defined interaction. They must support model transformations for refining a model during development. And most importantly, they must accurately include and simulate different notions of time in the model. UniTi is a model-based design flow and modelling and simulation environment that delivers on all these aspects. It is based on components that are signal transformations, and therefore mathematical functions. However, in each domain the representation of a signal differs. As components have the same structure in each domain, we can use unified composition operators to represent multiple domains in a single model. Furthermore, this composition provides a unified perspective on time in the domains, even though we differentiate between different notions of time. Time becomes a local property of the model, allowing us to represent and simulate time transformations such as time delays exactly without losing efficiency. Finally, model transformations are defined for such components, which are used for refining and developing the model and which are guided by the design steps in the design flow. We will formally define the domains, composition operators and transformations of UniTi and verify the approach with a case study on a phased array beamforming system. © 2012 Springer Science+Business Media New York.

关键词： embedded systems

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Certifiable Development Process for Information Processing in the Measurement Domain on the Base of 3W-Models

Certifiable Development Process for Information Processing i...

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IEEE Annual computer Software and Applications Conference Workshops (COMPSACW)

作者： Irina Gushchina Wolfgang Fengler Jirka Ciemala Detlef Streitferdt Computer Architecture and Embedded Systems Group Ilmenau University of Technology Ilmenau Germany Software Architectures and Product Lines Group Ilmenau University of Technology Ilmenau Germany

The paper presents a certifiable development process applicable to hardware and software development for information processing in the measurement domain, especially the dynamic weighing technology. Thereby it is based on the developments of prototypes for new and predecessor systems and product stages. Particular attention is paid to the possibility of calibration.

关键词： Prototypes Mathematical model embedded systems Hardware Safety Measurement uncertainty Field programmable gate arrays

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Mobile satellite reception with a virtual satellite dish based on a reconfigurable multi-processor architecture

Mobile satellite reception with a virtual satellite dish bas...

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作者： Van De Burgwal, M.D. Rovers, K.C. Blom, K.C.H. Kokkeler, A.B.J. Smit, G.J.M. Computer Architectures for Embedded Systems Group Faculty of Electrical Engineering Math and Computer Science University of Twente Enschede Netherlands

Traditionally, mechanically steered dishes or analog phased array beamforming systems have been used for radio frequency receivers, where strong directivity and high performance were much more important than low-cost requirements. Real-time controlled digital phased array beamforming could not be realized due to the high computational requirements and the implementation costs. Today, digital hardware has become powerful enough to perform the massive number of operations required for real-time digital beamforming. With the continuously decreasing price per transistor, high performance signal processing has become available by using multi-processor architectures. More and more applications are using beamforming to improve the spatial utilization of communication channels, resulting in many dedicated digital architectures for specific applications. By using a reconfigurable architecture, a single hardware platform can be used for different applications with different processing needs. In this article, we show how a reconfigurable multi-processor system-on-chip based architecture can be used for phased array processing, including an advanced tracking mechanism to continuously receive signals with a mobile satellite receiver. An adaptive beamformer for DVB-S satellite reception is presented that uses an Extended Constant Modulus Algorithm to track satellites. The receiver consists of 8 antennas and is mapped on three reconfigurable Montium TP processors. With a scenario based on a phased array antenna mounted on the roof of a car, we show that the adaptive steering algorithm is robust in dynamic scenarios and correctly demodulates the received signal. © 2011 Elsevier B.V. All rights reserved.

关键词： Beamforming

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Instruction set extensions for the advanced encryption standard on a multithreaded software defined radio platform

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International Journal of High Performance systems Architecture 2010年第3-4期2卷 203-214页

作者： Jenkins, Christipher Schulte, Michael Glossner, John Madison Embedded Systems and Architectures Laboratory Electrical and Computer Engineering Department University of Wisconsin-Madison 1415 Engineering Drive Madison WI 53706-1691 United States Sandbridge Technologies 120 White Plains Road Tarrytown NY 10591 United States

Software-defined radio (SDR) is an emerging technology that facilitates having multiple wireless communication protocols on one device. Previous work has shown that current wireless communication protocols can run on this class of device while consuming significant processing power. Next generation wireless networks require speeds in excess of 50 Mbps. Some of the fastest software implementations of the advanced encryption standard (AES) only achieve 20 Mbps on our reference platform. In order to have secure software-defined radio, the security processing gap must be addressed. This paper presents instruction set architecture (ISA) extensions for the sandblaster digital signal processor (DSP). The sandblaster DSP is a multithreaded processor for SDR that issues multiple operations each cycle and supports vector operations. Our proposed ISA extensions and hardware designs provide significant performance improvements for AES cryptography and should also work well with other types of embedded processors. Copyright © 2010 Inderscience Enterprises Ltd.

关键词： Software radio

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Reciprocal and reciprocal square root units with operand modification and multiplication

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Journal of VLSI Signal Processing systems for Signal, Image, and Video Technology 2006年第3期42卷 257-272页

作者： Wires, Kent E. Schulte, Michael J. Agere Systems Lehigh Valley Central Campus 1110 American Parkway NE Allentown PA 18109 Department of Electrical and Computer Engineering University of Wisconsin-Madison 1415 Engineering Drive Madison WI 53706 Agere Systems Allentown PA University of Wisconsin Madison Madison Embedded Systems and Architectures Group IEEE IEEE Computer Society

Reciprocals and reciprocal square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents high-speed methods for computing reciprocals and reciprocal square roots. These methods use a table lookup, operand modification, and multiplication to obtain an initial approximation. This is followed by a modified Newton-Raphson iteration, which improves the accuracy of the initial approximation. The initial approximation and Newton-Raphson iteration employ specialized hardware to reduce the delay, area, and power dissipation. The application of these methods is illustrated through the design of reciprocal and reciprocal square root units for operands in the IEEE single precision format. These designs are pipelined to produce a new result every clock cycle. © 2006 Springer Science + Business Media, Inc.

关键词： Digital signal processing

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A low-power multithreaded processor for software defined radio

A low-power multithreaded processor for software defined rad...

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作者： Schulte, Michael Glossner, John Jinturkar, Sanjay Moudgill, Mayan Mamidi, Suman Vassiliadis, Stamatis University of Wisconsin Dept. of ECE 1415 Engineering Drive Madison WI 53706 United States Sandbridge Technologies 1 North Lexington Ave. White Plains NY 10512 United States Delft University of Technology Electrical Engineering Mathematics and Computer Science Department Delft Netherlands University of Wisconsin Madison Madison Embedded Systems and Architectures Group IEEE IEEE Computer Society Sandbridge Technologies Sandbridge Systems Software and Communications Software Groups Department of Electrical and Computer Engineering University OfWisconsin Madison Netherlands ACM

embedded digital signal processors for software defined radio have stringent design constraints including high computational bandwidth, low power consumption, and low interrupt latency. Furthermore, due to rapidly evolving communication standards with increasing code complexity, these processors must be compiler-friendly, so that code for them can quickly be developed in a high-level language. In this paper, we present the design of the Sandblaster Processor, a low-power multithreaded digital signal processor for software defined radio. The processor uses a unique combination of token triggered threading, powerful compound instructions, and SIMD vector operations to provide real-time baseband processing capabilities with very low power consumption. We describe the processor's architecture and microarchitecture, along with various techniques for achieving high performance and low power dissipation. We also describe the processor's programming environment and the SB3010 platform, a complete system-on-chip solution for software defined radio. Using a super-computer class vectorizing compiler, the SB3010 achieves real-time performance in software on a variety of communication protocols including 802.11b, GPS, AM/FM radio, Bluetooth, GPRS, and WCDMA. In addition to providing a programmable platform for SDR, the processor also provides efficient support for a wide variety of digital signal processing and multimedia applications. © 2006 Springer Science + Business Media, LLC.

关键词： Program processors

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Functional validation of programmable architectures

Functional validation of programmable architectures

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Euromicro Symposium on Digital System Design

作者： P. Mishra N. Dutt Architectures and Compilers for Embedded Systems (ACES) Laboratory Center for Embedded Computer Systems University of California Irvine USA

Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current system-on-chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. Traditional validation techniques employ different reference models depending on the abstraction level and verification task (e.g., functional simulation or property checking), resulting in potential inconsistencies between multiple reference models. This paper presents a validation methodology that uses an architecture description language (ADL) based specification as a golden reference model for validation of programmable architectures, and generation of executable models such as simulators and hardware prototypes. We present a validation framework that uses the generated hardware as a reference model to verify the hand-written implementation using a combination of symbolic simulation and equivalence checking. We also present functional coverage based test generation techniques for validation of pipelined processor architectures. Finally, the generated simulator and hardware models are also used for early exploration of programmable architectures.

关键词： Pervasive computing computer architecture embedded computing computer bugs Hardware Personal digital assistants Coprocessors Computational modeling Handheld computers North America

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