Neural networks are applied to the problem of mesh placement for the finite-element method. When the finite-element method is used to numerically solve a partial differential equation with boundary conditions over a d...
Constrained optimization of the receiver's output variance has been proposed as a relatively simple method for designing blind multiuser detectors for DS-CDMA systems. A single constraint is sufficient to avoid si...
详细信息
Constrained optimization of the receiver's output variance has been proposed as a relatively simple method for designing blind multiuser detectors for DS-CDMA systems. A single constraint is sufficient to avoid signal cancellation in the AWGN case, while multiple constraints should be used in a multipath environment. A max/min approach for optimizing the constraint is proposed, resulting in blind solutions with improved performance. It is shown that the performance of the proposed method approaches that of the MMSE receiver at high SNR, while the constraint parameters converge to the multipath channel parameters. The proposed method does not require knowledge of the interfering users' codes and timing. Simulation results support those performance claims.
In the present paper, a new synthesis approach is developed for associative memories based on the perceptron learning algorithm. The design (synthesis) problem of feedback neural networks for associative memories is f...
详细信息
ISBN:
(纸本)0780341228
In the present paper, a new synthesis approach is developed for associative memories based on the perceptron learning algorithm. The design (synthesis) problem of feedback neural networks for associative memories is formulated as a set of linear inequalities such that the use of perceptron learning is evident. The perceptron learning in the synthesis algorithms is guaranteed to converge. To demonstrate the applicability of the present results, a specific example is considered.
Speeding up logic simulation is important to reduce design time of complex systems. Hardware emulation through reconfigurable systems (RS) built using FPGA's offer an cheap and efficient method to achieve the requ...
详细信息
Speeding up logic simulation is important to reduce design time of complex systems. Hardware emulation through reconfigurable systems (RS) built using FPGA's offer an cheap and efficient method to achieve the required speed-up. Emulation through RS poses some unique problems because of the limited circuit and I/O resources. A preparatory step for emulation using RS is to partition the circuit into as few parts as possible satisfying the resource constraints. This paper presents multi-objective search based optimal and approximate algorithms for circuit partitioning for this purpose.
Screen-printed Al and rapid thermal alloying have been combined in order to achieve an Al back surface field (Al-BSF) which lowers the effective back surface recombination velocity to 200 cm/s on 2.3 /spl Omega/cm Si....
详细信息
Screen-printed Al and rapid thermal alloying have been combined in order to achieve an Al back surface field (Al-BSF) which lowers the effective back surface recombination velocity to 200 cm/s on 2.3 /spl Omega/cm Si. This Al-BSF process has been integrated into a high-efficiency, laboratory fabrication sequence as well as a high-throughput, industrial-type process in order to achieve solar cell efficiencies in excess of 19.0% and 17.0%, respectively, on 2.3 /spl Omega/cm FZ Si. For both process sequences, the efficiency values are 1-2 absolute percentage points higher than cells made with unoptimized Al-BSFs. The critical process requirements for optimal Al-BSF formation are: (1) the use of a fast ramp rate to reach the alloying temperature; and (2) thick film Al deposition prior to alloying.
There have been a large number of systems that integrate logic and objects (frames or classes) for knowledge representation and reasoning. Most of those systems give pre-eminence to logic and their objects lack the st...
详细信息
There have been a large number of systems that integrate logic and objects (frames or classes) for knowledge representation and reasoning. Most of those systems give pre-eminence to logic and their objects lack the structure of frames. These choices imply a number of disadvantages, as the inability to represent exceptions and perform default reasoning, and the reduction in the naturalness of representation. In this paper, aspects of knowledge representation and reasoning in SILO, a system integrating logic in objects, are presented. SILO gives pre-eminence to objects. A SILO object comprises elements from both frames and classes. A kind of many-sorted logic is used to express object internal knowledge. Message passing, alongside inheritance, plays a significant role in the reasoning process. Control knowledge, concerning both deduction and inheritance. is separately and explicitly represented via definitions of certain functions, called meta-functions.
We consider the problem of transformations of logic programs without function symbols (database logic programs) into a special subclass, namely linear logic programs. Linear logic programs are defined to be the progra...
详细信息
For creation of a good program, excellent structured description is required for the algorithm. In this paper, a flowchart tutoring system is proposed. This system supports the flowchart description by each student an...
详细信息
For creation of a good program, excellent structured description is required for the algorithm. In this paper, a flowchart tutoring system is proposed. This system supports the flowchart description by each student and diagnoses its validity in the programming exercise process. First, a cooperative distributed method to support the flowchart description using the hierarchical structure of the structured programming is shown. A hierarchical diagnosis method consisting of syntax, logical structure and semantic validity diagnosis is explained. Algorithms using program slicing are proposed for the semantic validity diagnosis.
A new DCT architecture developed by Mou and Jutand (1991) is compared to an architecture based on distributed arithmetic with ROMs realized as random logic. Both architectures have been implemented in 0.8 /spl mu/m CM...
详细信息
A new DCT architecture developed by Mou and Jutand (1991) is compared to an architecture based on distributed arithmetic with ROMs realized as random logic. Both architectures have been implemented in 0.8 /spl mu/m CMOS technology and optimized with different constraints on area and timing. The results reveal that for HDTV applications the design with distributed arithmetic is superior, with lower power consumption and less than half the chip area.
In this study, we have developed the grain power spectrum neural network (GPSNN) to classify the ultrasonic backscattered grain signals for material characterization. The GPSNN has 32 input nodes, 13 hidden neurons de...
详细信息
In this study, we have developed the grain power spectrum neural network (GPSNN) to classify the ultrasonic backscattered grain signals for material characterization. The GPSNN has 32 input nodes, 13 hidden neurons determined adaptively, and one summing output node. A set of 4490 training sequences is utilized to train the neural network. A new set of 12572 testing sequences is used to test GPSNN performance. The samples tested for grain size discrimination are steel with grain sizes of 14 and 50 microns. GPSNN achieves an average recognition performance of over 98%. This high level of recognition suggests that the GPSNN is a promising method for ultrasonic nondestructive testing.
暂无评论