The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing e...
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ISBN:
(纸本)0769522033
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing element, and the time of the butterfly operation execution. The suggested approach involves creating parallel-pipeline structures for fixed radix FFT and for modified split radix FFT algorithms. The structures employed in the design show good possibilities for scaling the degree of parallelization, thus changing the overall throughput of the system. They are particularly suited for implementing in programmable logic basis (FPGA).
MARVIN is a model-helicopter based flying robot, which is able to operate completely autonomously. It has been designed to fulfill the demands of the International Aerial Robotics Competition (IARC) Millennial Event 1...
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MARVIN is a model-helicopter based flying robot, which is able to operate completely autonomously. It has been designed to fulfill the demands of the International Aerial Robotics Competition (IARC) Millennial Event 1998-2000. To improve the flight behavior, a mathematical model of the flight characteristics has been developed, which is used for simulation. The flight control algorithm is based on a hierarchy of PID controllers. The results of simulation and real flight experiments show similar behavior in many points but also that not all effects are taken into account, yet.
This paper presents a distributed, master-less communication system currently used for communication in a fleet of heterogeneous unmanned aerial vehicles in the European project COMETS for wired and wireless links. Co...
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This paper presents a distributed, master-less communication system currently used for communication in a fleet of heterogeneous unmanned aerial vehicles in the European project COMETS for wired and wireless links. Communication is realized using distributed shared memory (DSM) where each network node is holding full or part of the DSM. The coherency of the DSM is kept by a real-time aware protocol that provides quality of service guarantee and dynamic routing. Furthermore, an experiment is presented using the communication system on a wireless ad-hoc network.
We consider real-time CORBA 2.0 (dynamic scheduling) distributable threads operating in multihop networks. When distributable threads are subject to time/utility function-time constraints and utility accrual optimalit...
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We consider real-time CORBA 2.0 (dynamic scheduling) distributable threads operating in multihop networks. When distributable threads are subject to time/utility function-time constraints and utility accrual optimality criteria, utility accrual real-time channels must be established. Such channels transport inter-node messages of distributable threads in a way that maximizes system-wide, message-level accrued utility. We present a utility accrual channel establishment algorithm called local decision for utility accrual channel establishment (or Loc-DUCE) that heuristically computes channels. Our experimental measurements using a prototype implementation reveal that LocDUCE accrues significantly higher utility than the open shortest path first routing algorithm
real-timesystems, ranging from small portable devices or embedded systems to more complex general-purpose computers, are designed to satisfy various of real-time computation. It is the most important to guarantee all...
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ISBN:
(纸本)0769521525
real-timesystems, ranging from small portable devices or embedded systems to more complex general-purpose computers, are designed to satisfy various of real-time computation. It is the most important to guarantee all the requests are satisfied correctly in time. Rate monotonic algorithm is the most well-known real-time scheduling algorithm in the periodic task model. It not only has high schedulability, but also has a tight utilization bound to easily check whether the task set is feasible. In rate monotonic algorithm, a task is executed once in each period, but the start time of execution might be different in each period. On the contrary, for tasks scheduled using pinwheel model, the execution schedule in each period is always the same. Therefore, pinwheel scheduling model is very suitable for real-timesystems which need high predictability. The pinwheel scheduling model transforms the task periods into harmonic numbers shorter than or equal to the original periods and provides many advantageous scheduling features. However, not all tasks allow to do the transformation and some would like to be executed according to their original periods. In this paper, we discuss how to solve the problem and give an application in power-aware real-time scheduling, where we can see the pinwheel model is very important in current embedded system design with power-aware requirement.
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing e...
详细信息
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing e...
详细信息
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing element, and the time of the butterfly operation execution. The suggested approach involves creating parallel-pipeline structures for fixed radix FFT and for modified split radix FFT algorithms. The structures employed in the design show good possibilities for scaling the degree of parallelization, thus changing the overall throughput of the system. They are particularly suited for implementing in programmable logic basis (FPGA).
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing e...
详细信息
The article is devoted to creating a complete methodology for automatic synthesis of real-time FFT-processors at structural level under the given restrictions: speed of input data receipt, structure of the computing element, and the time of the butterfly operation execution. The suggested approach involves creating parallel-pipeline structures for fixed radices FFT and for modified split radix FFT algorithms. The structures employed in the design show good possibilities for scaling the degree of parallelization, thus changing the overall throughput of the system. They are particularly suited for implementing in programmable logic basis (FPGA).
Programs employed for purposes of safety related control must be formally safety licensed, which constitutes a very difficult and hitherto not satisfactorily solved problem. Striving for utmost simplicity and easy com...
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Rapid prototyping is an automated manufacturing process that quickly builds physical models from CAD files of three-dimensional prototypes. It dramatically speeds up design and manufacturing processes and substantiall...
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