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Enhanced Realtime Sign Language Detection and Multilingual Translation System

Enhanced Realtime Sign Language Detection and Multilingual T...

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2025 International Conference on Computing for Sustainability and Intelligent Future, COMP-SIF 2025

作者： Kakkar, Madhur Daniel, John Sudha, D. Sathyabama Institute of Science and Technology Dept. of Computer Science and Engineering Chennai India

ISBN: (纸本)9798331538538

Sign language is the communication medium that is utilized by the hearing-impaired community. The medium is visual and it uses hand signs and symbols for communication. Over 300 different types of sign languages present in the world today. Sign language uses gestures and hand movements for the majority of the words and finger spellings for the rest. Nonverbal speakers face a lot of challenges while interacting with verbal speakers. Even non-verbal speakers who speak different sign languages face difficulties communicating with each other. This project proposes an enhanced real-time system which detects gestures and finger spellings of multiple sign languages, and translates them into multiple spoken languages. The proposed system aims to utilize CNN network for finger spelling recognition and Long Short-Term Memory (LSTM) network for gesture interpretation. The system will use computer vision for accurate gesture detection and Google Translator API for recognizing signs which will be translated into multiple spoken languages. Initial tests with isolated datasets indicate promising accuracy for both finger spelling and gesture recognition. The goal of the completed system is to help aid communication between verbal and non-verbal speakers and to provide an efficient mode of communication between the two communities. © 2025 IEEE.

关键词： Interactive computer systems

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Real-Time Gaze Tracking for Online Examination

Real-Time Gaze Tracking for Online Examination

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2025 International Conference on Pervasive Computational Technologies, ICPCT 2025

作者： Bisht, Preyanshu Kumar, Suresh Netaji Subhas University of Technology Dept. of Computer Science and Engineering Delhi India

ISBN: (纸本)9798331508685

The exponential growth in online education has increased the demand for automated systems to ensure academic integrity during online examinations. A real-time proctoring system addresses this need by monitoring a student's eye gaze and head movements during an exam. This system leverages Dlib's pre-trained frontal face detector and 68-point facial landmark predictor to detect facial features and track the direction of eye movement and head position. By analyzing these metrics, the system can flag behaviors associated with potential cheating, such as looking away from the screen for extended periods. This paper discusses the design and implementation of the proctoring system, details the detection algorithms, and evaluates its effectiveness for real-time monitoring. © 2025 IEEE.

关键词： Online systems

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MOSA: Matrix Optimized Self-Attention Hardware Accelerator for Mobile Device

MOSA: Matrix Optimized Self-Attention Hardware Accelerator f...

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2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

作者： Chang, Yang-Rwei Chen, Hsuan-Fu Shih, Horng-Yuan Tamkang University Dept. Electrical and Computer Engineering New Taipei City Taiwan

ISBN: (纸本)9798331510756

The Self-Attention mechanism, which lies at the core of Transformer architectures, plays a vital role in capturing long-range dependencies. However, its high computational complexity and significant memory requirements pose major challenges for resource-constrained hardware such as mobile devices. In particular, frequent memory accesses and inefficient matrix multiplication operations often result in performance bottlenecks. Therefore, the development of dedicated hardware accelerators for Self-Attention, focusing on optimizing matrix operations and reducing memory usage, is essential for improving AI processing efficiency on mobile devices. This paper presents a Self-Attention hardware accelerator designed specifically for mobile devices. By optimizing the matrix multiplication process, the accelerator effectively reduces data transmission and memory access frequency, thereby lowering the overall computational complexity. It also reuses intermediate computation results, minimizing frequent memory read and write operations, which significantly reduces memory bandwidth requirements. This data reuse strategy not only cuts down on redundant computations but also greatly enhances computational efficiency. In addition, the accelerator eliminates the need for Key Transpose operations, further simplifying certain computational steps. Compared to traditional algorithms, the idle time is reduced by 66.5%., and signal line transmission costs are reduced by approximately 80%. With an optimized hardware architecture, mobile devices can efficiently support complex deep learning applications, such as speech processing and image recognition. © 2025 IEEE.

关键词： Matrix algebra

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The Effect of Mode of Control on Voltage Stability in DC Micro-grids Operating with Constant Power Loads 33

The Effect of Mode of Control on Voltage Stability in DC Mic...

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33rd Southern African Universities Power engineering Conference, SAUPEC 2025

作者： Zheve, Leon T. Gitau, Michael N. Masike, Lebogang University of Pretoria Dept. of Electrical Electronic and Computer Engineering Pretoria South Africa

ISBN: (纸本)9798331535162

The penetration of renewable energy systems has helped trigger the shift to DC distribution systems. Switching converters are the building blocks of DC distribution systems and these individual blocks have their unique control. Manufacturers of these building blocks tend to overlook the effect of coupling converters together that have closed loop control, and integration engineers face the challenge of voltage instability during integration. Load converters operating with closed-loop control behave as constant power loads and have a destabilizing negative incremental resistance that diminishes the damping of the system at the DC bus they are connected. The mode of control also influences how far the action of constant power loads drives the system into instability. This work compares the average current mode control and voltage mode control applied to small DC network to see which control mode is better to implement for DC distribution grids. Simulations of a small single bus DC distribution system comprising of two constant power loads and a source converter were carried out with the objective of comparing the extent of bus voltage deterioration when using either control modes. The simulation results show that for the same system average current mode control is better at maintaining voltage stability compared voltage mode control. © 2025 IEEE.

关键词： DC distribution systems

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Real-Time Dynamic Image Stitching Using GNN-Based Feature Matching 11

Real-Time Dynamic Image Stitching Using GNN-Based Feature Ma...

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11th International Conference on Mechatronics and Robotics engineering, ICMRE 2025

作者： Suh, Young Hoon Kim, Eun Ho Choi, Yeong Gwang Jeon, JaeWook Sungkyunkwan University Dept. of Electrical and Computer Engineering Suwon16419 Korea Republic of

ISBN: (纸本)9798331509293

Especially in static situations, image stitching has been routinely used to seamlessly merge many photographs into a panorama. Using it in dynamic and real-time environments, however, presents a number of difficulties, such as managing shifting objects, changing surroundings, and processing limitations. An image stitching look at that works well in dynamic real-time situations is presented in this paper. The method makes use of GNN-based feature matching, dynamic object removal, and real-time synthesis techniques. Comparative studies suggest that, in comparison to traditional methods like SIFT and ORB, the suggested approach meets real-time processing requirements while achieving greater registration precision, lower homography RMSE, and consistent panoramic outputs. The findings imply that the algorithm might be used in fields where precision and efficiency are required in dynamic circumstances, like parking management systems, sports broadcasting, and autonomous driving. © 2025 IEEE.

关键词： Photointerpretation

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Machine Learning Approach for Career Guidance Using Brain mapping Technique and Psychometric Test 1

Machine Learning Approach for Career Guidance Using Brain ma...

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1st International Conference on AIML-Applications for engineering and Technology, ICAET 2025

作者： Suryawanshi, Soham Kolhe, Chaitanya More, Pranav Barhate, Jayesh Deshmukh, Rushali Hingmire, Amruta JSPM's Rajarshi Shahu College of Engineering Dept. of Computer Engineering Pune India School of Computer Engineering and Technology PCET's Pimpri Chinchwad University Pune India

ISBN: (纸本)9798350355611

After completing upper secondary education, students all over the world commonly struggle to make the crucial decision of pursuing a decent job path. Many of them lack the maturity and experience required to make sound judgments at the age of 18, leaving them concerned about their future. The challenge of identifying whether they have the necessary skills for their chosen vocation adds to the difficulty of the task. Our answer to this problem is an automated career counselling system based on psychometric tests and brain mapping techniques employing scenario-based testing as an approach using machine learning ideas that supports students in picking the optimal career path according to their interests and skill set. The user will first take the Psychometric test, which will help us analyse the user's intelligence ability, followed by another test using the brain mapping technique to help uncover his personality qualities. Based on these two tests, the ultimate outcome will be evaluated by balancing the results of the psychometric and brain mapping tests and forecasting a viable and relevant career choice, which will be backed by college admission support, a thorough career plan, and opportunities for additional study. © 2025 IEEE.

关键词： Brain mapping

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Low-Power and Superior Performance Design of Ternary Logic Cells Using CNFET and MOSFET Devices for VLSI Applications 38

Low-Power and Superior Performance Design of Ternary Logic C...

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38th International Conference on VLSI Design, VLSID 2025

作者： Bhupathiraju, Siva Chinmai Varma Krishna, Sridhara Sai Komuravelly, Yashwanth Yadav, Ramakant Mahindra University Dept. of Electrical and Computer Engineering Telangana Hyderabad500043 India

ISBN: (纸本)9798331522445

This work explores the implementation of ternary logic using novel devices, particularly Carbon Nanotube Field Effect Transistors (CNFETs). CNFETs leverage single-walled carbon nanotubes as conducting channels, and by adjusting the diameter of the carbon nanotubes, we can control the device's threshold voltage. This characteristic makes CNFETs well-suited for ternary logic, as we can easily create Low Voltage Threshold (LVT) and High Voltage Threshold (HVT) devices required for implementing ternary logic. Optimized MOSFET and CNFET, N, and P-channel devices are benchmarked and compared at 45 nm technology node. Furthermore, we present the design and functionality of ternary inverters using both MOSFETs and CNFETs, including Negative Ternary Inverter (NTI), Positive Ternary Inverter (PTI), and Standard Ternary Inverter (STI). The performance of all the logic cells mentioned in the paper was benchmarked and it is observed that CNFET ternary cells have lower PDP compared to MOSFET ternary cells. A decrease of 23.78% and 20.78% in PDP is observed for NTI and PTI logic cells, respectively, and a decrease of 29.65% and 29.35% is observed for STI 1 and STI 2 logic cells, respectively. © 2025 IEEE.

关键词： Single-walled carbon nanotubes (SWCN)

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A Pulse Width Modulation-Based Spike Generator to Eliminate Timing Errors in Spiking Neural Networks

A Pulse Width Modulation-Based Spike Generator to Eliminate ...

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2025 International Conference on Electronics, Information, and Communication, ICEIC 2025

作者： Jo, Jungkook Sim, Keonhee Sim, Sangwoong Jun, Jaehoon Inha University Dept. of electrical and computer engineering and program in semiconductor convergence Incheon Korea Republic of Inha University Dept. of electrical engineering Incheon Korea Republic of

ISBN: (纸本)9798331510756

This paper proposes a novel spike generator for processing in memory (PIM) technology. Most of the electronics today utilize a von Neumann architecture. The von Neumann architecture suffers from the separation of memory and processor. This architecture delays data transfer between memory and processor. To overcome the issues, we utilize the spiking neural network (SNN) that combines memory and processor. SNN can be classified into voltage-based, current-based, and time-based architectures, each with its own pros and cons. Time-based SNN suffers from timing issues. To address the timing sensitivity of time-based neuron SNN, this paper proposes a PWM-based SNN. The PWM-based SNN utilizes pulse width-based logic to overcome timing sensitivity. © 2025 IEEE.

关键词： Pulse width modulation

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An Extended Reality Platform Powered by Large Language Models: A Case Study on Teaching Dance Costumes 7

An Extended Reality Platform Powered by Large Language Model...

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7th IEEE International Conference on Artificial Intelligence and eXtended and Virtual Reality, AIxVR 2025

作者： Garzarella, Silvia Vallasciani, Giacomo Cascarano, Pasquale Hajahmadi, Shirin Cervellati, Elena Marfia, Gustavo University of Bologna Dept. of the Arts Bologna Italy University of Bologna Dept. of Computer Science and Engineering Bologna Italy

ISBN: (纸本)9798331521578

In this paper, we present an Extended Reality (XR) platform powered by Large Language Models (LLMs), designed to support education in dance history and cultural heritage. The platform here applied to a case study on a dance costume, allows users to interact with 3D models, annotate them, and explore their historical and cultural contexts collaboratively. Using features like image-to-LLM queries, users can gain insights into costume details and performance history, and the annotation tools enable uploading multimedia resources, thereby simulating an archival research environment. By integrating LLMs, the platform provides tailored information and context on demand, enriching the user experience with detailed explanations about objects, such as costume construction, usage, and cultural significance. © 2025 IEEE.

关键词： Hosiery manufacture

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Dynamic SpikFormer: Low-Latency & Energy-Efficient Spiking Neural Networks with Dynamic Time Steps for Vision Transformers

Dynamic SpikFormer: Low-Latency & Energy-Efficient Spiking N...

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2025 IEEE International Conference on Acoustics, Speech, and Signal Processing, ICASSP 2025

作者： Datta, Gourav Liu, Zeyu Li, Anni Beerel, Peter A. Dept. of Electrical Computer & Systems Engineering Case Western Reserve University Cleveland United States Ming Hsieh Dept. of Electrical and Computer Engineering University of Southern California Los Angeles United States

ISBN: (纸本)9798350368741

Spiking Neural Networks (SNNs) have emerged as a popular spatio-temporal computing paradigm for complex vision tasks. Recently proposed SNN training algorithms have significantly reduced the number of time steps (down to 1) for improved latency and energy efficiency, however, they target only convolutional neural networks (CNN). These algorithms, when applied to the recently spotlighted vision transformers (ViT), either require a large number of time steps or fail to converge. Based on the analysis of the histograms of the ANN and SNN activation maps, we hypothesize that each ViT block has a different sensitivity to the number of time steps. We propose a novel training framework that dynamically allocates the number of time steps to each ViT module depending on a trainable score assigned to each timestep. In particular, we generate a scalar binary time step mask that filters spikes emitted by each neuron in a leaky-integrate-and-fire (LIF) layer. The resulting SNNs have high activation sparsity and require only accumulate operations (AC), except for the input embedding layer, in contrast to expensive multiply-and-accumulates (MAC) needed in traditional ViTs. This yields significant improvements in energy efficiency. We evaluate our training framework and resulting SNNs on image recognition tasks including CIFAR10, CIFAR100, and ImageNet with different ViT architectures. We obtain a test accuracy of 95.97% with 4.97 time steps with direct encoding on CIFAR10. © 2025 IEEE.

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