Business process modeling (BPM) is one of the key factors in defining service-oriented solutions for business collaborations. Like in traditional software engineering there is a need for adaptable methodologies to dev...
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Business process modeling (BPM) is one of the key factors in defining service-oriented solutions for business collaborations. Like in traditional software engineering there is a need for adaptable methodologies to develop information and communication technology (ICT) systems supporting collaborative business processes. In this work we introduce a categorization for the classification of modeling languages and approaches used to model collaborative business processes. Considering an example, we show how the classification of modeling languages and approaches facilitates the development of methodologies for collaborative business processes.
The problem that a robot navigates autonomously through its environment, builds its own map and localizes itself in the map (known a the SLAM problem), is still an open problem. Most of the approaches to solve the SLA...
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Pedagogical algorithm visualization systems produce graphical representations that aim to assist learners in understanding the dynamic behavior of computer algorithms. In order to foster active learning, educators hav...
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Pedagogical algorithm visualization systems produce graphical representations that aim to assist learners in understanding the dynamic behavior of computer algorithms. In order to foster active learning, educators have explored algorithm visualization systems that empower learners to construct their own visualizations of algorithms under study. Notably, these systems support a similar development model in which coding the algorithm is temporally distinct from viewing and interacting with the resulting visualization. To explore the benefits of narrowing the gap between coding an algorithm and viewing its visualization, we have implemented "What You See Is What You Code", a novel, "radically dynamic" development model to facilitate learner-constructed algorithm visualizations. In this model, the line of algorithm code currently being edited is reevaluated on every edit, leading to the dynamic update of an accompanying visualization of the algorithm. Analysis of usability studies involving introductory computer science students suggests that the immediacy of the model's feedback can help novices to quickly identify and correct programming errors, and ultimately to understand their code's execution.
Even modern component architectures do not provide for easily manageable context-sensitive adaptability, a key requirement for ambient intelligence. The reason is that components are too large - providing black boxes ...
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Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-com...
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Dynamic voltage and frequency scaling (DVFS) is an effective technique for controlling microprocessor energy and performance. Existing DVFS techniques are primarily based on hardware, OS time-interrupts, or static-compiler techniques. However, substantially greater gains can be realized when control opportunities are also explored in a dynamic compilation environment. There are several advantages to deploying DVFS and managing energy/performance tradeoffs through the use of a dynamic compiler. Most importantly, dynamic compiler driven DVFS is fine-grained, code-aware, and adaptive to the current microarchitecture environment. This paper presents a design framework of the run-time DVFS optimizer in a general dynamic compilation system. A prototype of the DVFS optimizer is implemented and integrated into an industrial-strength dynamic compilation system. The obtained optimization system is deployed in a real hardware platform that directly measures CPU voltage and current for accurate power and energy readings. Experimental results, based on physical measurements for over 40 SPEC or Olden benchmarks, show that significant energy savings are achieved with little performance degradation. SPEC2K FP benchmarks benefit with energy savings of up to 70% (with 0.5% performance loss). In addition, SPEC2K INT show up to 44% energy savings (with 5% performance loss), SPEC95 FP save up to 64% (with 4.9% performance loss), and Olden save up to 61% (with 4.5% performance loss). On average, the technique leads to an energy delay product (EDP) improvement that is 3times-5times better than static voltage scaling, and is more than 2times (22% vs. 9%) better than the reported DVFS results of prior static compiler work. While the proposed technique is an effective method for microprocessor voltage and frequency control, the design framework and methodology described in this paper have broader potential to address other energy and power issues such as di/dt and thermal control
The paper presents a new algorithm for the analysis of the kinematic singularities for different parallel structures using a testing stand. The derived expressions are used to superimpose graphical representations of ...
In the present work, we outline a reverse engineering approach for UML specifications in form of class diagrams from Java bytecode. After a brief introduction to the subject we present some analyses which go beyond me...
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ISBN:
(纸本)1581138334
In the present work, we outline a reverse engineering approach for UML specifications in form of class diagrams from Java bytecode. After a brief introduction to the subject we present some analyses which go beyond mere enumeration of methods and fields. A glance onto some related work shows that there seems to be no pat solution for the reverse engineering of the more difficult class diagram elements. We sketch our method of determining association multiplicities, being, in a sense, representative of our approach in general: "intuitive" analyses, producing results that can be understood by a programmer when inspecting the source code of a given class. Finally, we introduce a tool that implements this work and we apply it onto a small real life example, discussing the results it gave.
Runtime verification is a special form of runtime testing, employing formal methods and languages. In this work, we utilize next-time free linear-time temporal logic (LTL\X) as formal framework. The discipline serves ...
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ISBN:
(纸本)1581138334
Runtime verification is a special form of runtime testing, employing formal methods and languages. In this work, we utilize next-time free linear-time temporal logic (LTL\X) as formal framework. The discipline serves the purpose of asserting certain design-time assumptions about object-oriented (OO) entities such as objects, methods, and so forth. In this paper we propose a linear-time logic over join-points [4], and introduce a lightweight runtime verification tool based on this logic, J2SE 5 metadata [3] and an AspectJ-based [2] runtime backend. Implementations have been proposed so far for imperative and functional languages [5]. To our knowledge our approach is the first to allow addressing of entire sets of states, also over subclass boundaries, thus exploiting the OO nature.
This paper describes the principles underlying an efficient implementation of a lazy functional language, compiling to code for ordinary computers. It is based on combinator-like graph reduction: the user defined func...
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This paper describes the principles underlying an efficient implementation of a lazy functional language, compiling to code for ordinary computers. It is based on combinator-like graph reduction: the user defined functions are used as rewrite rules in the graph. Each function is compiled into an instruction sequence for an abstract graph reduction machine, called the G-machine, the code reduces a function application graph to its value. The G-machine instructions are then translated into target code. Speed improvements by almost two orders of magnitude over previous lazy evaluators have been measured;we provide some performance figures.
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