This paper presents an automated code generation and validation, verification approach to convert model based developments into IEC 61131-3 conform function blocks. IEC 61131-3 programming languages are supported by P...
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In this paper, we propose an OpenCL framework for GPU clusters. The target cluster architecture consists of a single host node and multiple compute nodes. They are connected by an interconnection network, such as Giga...
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The objective of this study is to develop a socially-intelligent service team comprised of multiple robots with sophisticated sonic interaction capabilities that aims to transparently collaborate towards efficient and...
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The objective of this study is to develop a socially-intelligent service team comprised of multiple robots with sophisticated sonic interaction capabilities that aims to transparently collaborate towards efficient and robust monitoring by close interaction. In the distributed scenario proposed in this study, the robots share any acoustic data extracted from the environment and act in-sync with the events occurring in their living environment in order to provide potential means for efficient monitoring and decision-making within a typical home enclosure. Although each robot acts as an individual recognizer using a novel emotionally-enriched word recognition system, the final decision is social in nature and is followed by all. Moreover, the social decision stage triggers actions that are algorithmically distributed among the robots' population and enhances the overall approach with the potential advantages of the team work within specific communities through collaboration.
Member of the Russian Academy of Sciences Vladimir Melnikov was a disciple of the great Russian scientist, academician Sergei Lebedev, who was the founder of the national computer science, the creator of the first Sov...
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Member of the Russian Academy of Sciences Vladimir Melnikov was a disciple of the great Russian scientist, academician Sergei Lebedev, who was the founder of the national computer science, the creator of the first Soviet computers, the chief designer of computers that made up the famous BESM line (high-speed electronic computers). Since 1950, being the fifth-year student, he worked in the Academic Institute of Precise Mechanics and computer Engineering (IPMCE), where participated in the development of the first soviet electronic computer. The serial BESM version was called BESM-2, and Melnikov became the executive in charge. Later this computer was replicated in China. A significant role in the life of Melnikov was played by the creation of the transistor BESM-6 computer, on which he worked as a deputy chief designer. In 1967, this computer was put into production and was produced for 17 years. In 1969 Melnikov started the design and development of a computing system "BESM-6 pairing hardware interface" (HI-6). In 1975, during the Soviet-American space flight 'Soyuz-Apollo' the operation was carried out on the system, built on the basis of HI-6 and BESM-6, that also provided a highly automated processing of ballistic and telemetry data in the Soviet Mission Control Center. Since 1978 Melnikov began to develop a new supercomputer, which had the name 'Electronics SS BIS' and was close to the American supercomputer Cray 1 in its instruction set.
The structured approach to argumentation has seen a surge of models, introducing a multitude of ways to deal with the formalisation of arguments. However, while the development of the mathematical models have flourish...
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ISBN:
(纸本)9783939897637
The structured approach to argumentation has seen a surge of models, introducing a multitude of ways to deal with the formalisation of arguments. However, while the development of the mathematical models have flourished, the actual implementations and development of methods for implementation of these models have been lagging behind. This paper attempts to alleviate this problem by providing methods that simplify implementation, i.e. we demonstrate how the functional programming language Haskell can naturally express mathematical definitions and sketch how a theorem prover can verify this implementation. Furthermore, we provide methods to streamline the documenting of code, showing how literate programming allows the implementer to write formal definition, implementation and documentation in one file. All code has been made publicly available and reusable.
R is an environment and functional programming language for statistical data analysis and visualization. Largely unknown to the functional programming community, it is popular and influential in many empirical science...
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Argumentation theory is an interdisciplinary field studying how conclusions can be reached through logical reasoning. The notion of argument is completely general, including for example legal arguments, scientific arg...
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Advanced Encryption Standard (AES), which is approved and published by Federal Information Processing Standard (FIPS), is a cryptographic algorithm that can be used to protect electronic data. The AES algorithm can be...
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ISBN:
(纸本)9783319009506
Advanced Encryption Standard (AES), which is approved and published by Federal Information Processing Standard (FIPS), is a cryptographic algorithm that can be used to protect electronic data. The AES algorithm can be programmed in software or hardware. This paper presents encryption time comparison of the AES algorithm on FPGA and computer. In the study, Verilog HDL and C programming language is used on the FPGA and computer, respectively. The AES algorithm with 128-bit input and key length 128-bit (AES-128) was simulated on Xilinx ISE Design Suite 13.3. It was observed that, the AES algorithm runs on the FPGA faster than on a computer. We measured the time of encryption on FPGA and computer. Encryption time is 390ns of AES on FPGA and 11 μs of AES on a computer.
On large-scale clusters, tens to hundreds of applications can simultaneously access a parallel file system, leading to contention and in its wake to degraded application performance. However, the degree of interferenc...
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On large-scale clusters, tens to hundreds of applications can simultaneously access a parallel file system, leading to contention and in its wake to degraded application performance. However, the degree of interference depends on the specific file access pattern. On the basis of synchronized time-slice profiles, we compare the interference potential of different file access patterns. We consider both micro-benchmarks, to study the effects of certain patterns in isolation, and realistic applications to gauge the severity of such interference under production conditions. In particular, we found that writing large files simultaneously with small files can slow down the latter at small chunk sizes but the former at larger chunk sizes. We further show that such effects can seriously affect the runtime of real applications-up to a factor of five in one instance. In the future, both our insights and profiling techniques can be used to automatically classify the interference potential between applications and to adjust scheduling decisions accordingly.
This paper presents an automated code generation and validation, verification approach to convert model based developments into IEC 61131-3 conform function blocks. IEC 61131-3 programming languages are supported by P...
This paper presents an automated code generation and validation, verification approach to convert model based developments into IEC 61131-3 conform function blocks. IEC 61131-3 programming languages are supported by PLC manufacturers and software environment developers and provide the possibility that novel and intelligent algorithms can be directly operated on industrial accepted systems. Railway and transportation also receive drastic changes from purely hardware based systems to microcontroller + software driven systems. However, the conversion has to follow certain steps to ensure that the adaptation is done correctly and functionality is not alternated, added or deleted. Concepts suggested by different international standards such as the IEC 61508 can help to derive a tool chain to verify the generated code.
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