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A reconfigurable ray-tracing Multi-Processor SoC with hardware replication-aware instruction set extension

A reconfigurable ray-tracing Multi-Processor SoC with hardwa...

引用

13th International Conference on Algorithms and Architectures for Parallel Processing, ICA3PP 2013

作者： Nery, Alexandre S. Nedjah, Nadia França, Felipe M.G. Jozwiak, Lech Corporaal, Henk LAM - Computer Architecture and Microeletronics Laboratory Systems Engineering and Computer Science Program COPPE Federal University of Rio de Janeiro Brazil Department of Electronics Engineering and Telecommunications Faculty of Engineering State University of Rio de Janeiro Brazil Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology Netherlands

ISBN: (纸本)9783319038582

Application code and processor parallelization, together with instruction set customization, are the most common and effective ways to enhance the performance and efficiency of application-specific processors (ASIPs). Both the effective code parallelization and data/task parallelism exploitation, as well as effective instruction set customization, enable an ASIP to achieve a significant performance improvement using limited extra hardware resources. However, a naive parallelization or instruction set customization may not result in the required performance improvement, leading to a waste of computing and energy resources. Therefore, when performing parallelization or custom instruction selection, complex tradeoffs between processing speed, circuit area and power consumption must be closely observed. In this paper, we propose and discuss an efficient ASIP-based Multi-Processor System-on-a-Chip (MPSoC) design for ray-tracing, exploiting application parallelism and hardware replication-aware instruction set customization. Without hardware sharing among the custom instructions units, the proposed parallel ray-tracer MPSoC design with custom instructions achieves 77% speed up in comparison to a single microprocessor design with the default instruction set. However, with the replication-aware instruction set customization, the speed up increases to 81%. © Springer International Publishing Switzerland 2013.

关键词： Integrated circuit design

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The computer science fair: an alternative to the computer programming contest 96

The computer science fair: an alternative to the computer pr...

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Proceedings of the twenty-seventh SIGCSE technical symposium on computer science education

作者： Sue Fitzgerald Mary Lou Hines Department of Math Computer Science and Physics Rockhurst College Kansas City MO Computer Science and Telecommunications Program University of Missouri -- Kansas City Kansas City MO

ISBN: (纸本)9780897917575

Dissatisfaction with the results of programming contest events has led to the development of a new type of competitive event, a computer science fair. The computer science fair, a combination art show/science fair, is designed to attract a wider diversity of participants, to encourage creativity, and to reinforce good project development practices. Students are asked to creatively use technology to express themselves, to design new inventions, and to solve problems by submitting projects in the following categories: 1) computers and the arts and humanities --- computer music, computer art, multimedia projects; 2) computer programs --- entertainment, education, scientific, business, modeling and simulation; and 3) computer or electronically controlled inventions. This paper outlines the rules for submissions and judging of projects and the results of the First Annual Kansas City computer science Fair. Results based on gender and age category are reported.

关键词： gender issues

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Partition and task migration on k-extra-stage omega networks

Partition and task migration on k-extra-stage omega networks

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International Conference on Parallel Processing (ICPP)

作者： Xiaojun Shen Yixin Zhang Computer Science Telecommunications Program University of Missouri Kansas City Kansas City MO USA Computer Science Department Guangdong Institute of Technology Guangzhou Guangdong China

ISBN: (纸本)081867623X

In a large-scale parallel computing system the interconnection network is its key component. Partitionability of such a network is an important feature which allow multiple tasks to be run independently on different subsystems. Partitionable networks also provide fault-tolerant ability by localizing and disabling the minimal faulty subsystem so the entire system can gracefully sustain the normal computation. A task run on a subsystem may need to be migrated to another subsystem if the subsystem is faulty, or load balance is needed, or subsystem restructuring desired. Siegel et al. (1990) discussed the migration problem for Omega-equivalent networks. This paper studies the partitionability and presents an optimal task migration algorithm for k-extra-stage Omega networks.

关键词： Parallel processing Multiprocessor interconnection networks computer science Cities and towns Large-scale systems Fault tolerant systems computer networks Partitioning algorithms Electronic mail Degradation

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On indoor position location with wireless LANs

On indoor position location with wireless LANs

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IEEE International Symposium on Personal, Indoor and Mobile Radio Communications (PIMRC)

作者： P. Prasithsangaree P. Krishnamurthy P. Chrysanthis Telecommunications Program University of Pittsburgh Pittsburgh PA USA Department of Computer Science University of Pittsburgh Pittsburgh PA USA

Location aware services are becoming attractive with the deployment of next generation wireless networks and broadband multimedia wireless networks especially in indoor and campus areas. To provide location aware services, obtaining the position of a user accurately is important. While it is possible to deploy additional infrastructure for this purpose, using existing communications infrastructure is preferred for cost reasons. Because of technical restrictions, location fingerprinting schemes are the most promising. In this paper we present a systematic study of the performance tradeoff and deployment issues. In this paper we present some experimental results towards such a systematic study and discuss some issues related to the indoor positioning problem.

关键词： Wireless LAN Local area networks Fingerprint recognition Costs Mobile computing Wireless networks Global Positioning System Wireless communication Databases computer science

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Data sharing and recovery in gigabit-networked databases

Data sharing and recovery in gigabit-networked databases

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International Conference on computer Communications and Networks (ICCCN)

作者： S. Banerjee P.K. Chrysanthis Telecommunications Program University of Pittsburgh Pittsburgh PA USA Computer Science Department University of Pittsburgh Pittsburgh PA USA

Major advances in optical fiber transmission and switching technology have enabled the development of very high speed networks with data rates of the order of gigabits per second. It is anticipated that in the future, wide area gigabit networks will interconnect database servers around the globe creating extremely powerful distributed information systems. In this paper, we examine the implications of such a high speed network on data access and sharing techniques and propose a lock-based concurrency control protocol and a log-based recovery protocol that ensures data consistency in gigabit-networked databases. Both protocols exploit the characteristics of a gigabit network to enhance the performance of the database system and, in particular, the fact that the size of the message is less of a concern than the number of sequential phases of message passing.

关键词： Access protocols High-speed networks Optical fibers Power system interconnection Distributed databases Network servers Ultraviolet sources Distributed information systems Concurrency control Database systems

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DQFS service: a tunable scheme to reduce scheduling overhead in integrated services networks

DQFS service: a tunable scheme to reduce scheduling overhead...

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Conference on Local computer Networks (LCN)

作者： M.S. Boykin T.F. Znati Department of Computer Science University of Pittsburgh Pittsburgh PA USA Telecommunications Program University of Pittsburgh Pittsburgh PA USA

Discrete service disciplines have been shown capable of emulating the ideal Generalized Processor Sharing discipline within one maximum-sized packet's transmission time. As a result, the accuracy of such schemes increases with improvements in link speed due to the corresponding reduction in packet transmission delay. However, the merits of such accuracy diminish with improvements in link speed as its impact on call admission decisions decreases. Meanwhile, overhead, in terms of the number of scheduling decisions to be made per unit time, increases with the number of packets transmitted. In response, this paper will present the DQFS service discipline which enables GPS emulation servers to dynamically "tune" their service quanta based upon the QoS requirements of their currently supported applications rather than the network's maximal packet size. It will also demonstrate how the overhead of a GPS emulation server can be reduced in high speed networks without jeopardizing QoS guarantees or adversely impacting fairness.

关键词： Intelligent networks Intserv networks Global Positioning System Processor scheduling Emulation computer science Network servers High-speed networks Influenza

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Diverse routing for survivability in a fiber-based sparse network

Diverse routing for survivability in a fiber-based sparse ne...

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IEEE International Conference on Communications (ICC)

作者： D. Medhi Center of Advanced Technology Computer Science Telecommunications Program University of Missouri Kansas City Kansas City MO USA

The problem of obtaining optimal pairs of diverse routes to minimize cost for given demand, capacity, and bound requirements is addressed. The mathematical formulation of this problem yields a mixed-integer, multicommodity flow model which can be solved by a Lagrangian relaxation-based algorithm exploiting the structure of the problem. A preliminary study shows improvement in worst case network survivability with diverse routing.< >

关键词： Routing Intelligent networks Telecommunication traffic Mathematical model Lagrangian functions Cities and towns Optical fibers Cost function Spine computer science

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A parallel Ray Tracing architecture suitable for application-specific hardware and GPGPU implementations

A parallel Ray Tracing architecture suitable for application...

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2011 14th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2011

作者： Nery, Alexandre S. Nedjah, Nadia Franca, Felipe M.G. Jozwiak, Lech LAM - Computer Architecture and Microelectronics Laboratory Systems Engineering and Computer Science Program COPPE Universidade Federal Rio de Janeiro Brazil Department of Electronics Engineering and Telecommunications Faculty of Engineering Universidade do Estado Rio de Janeiro Brazil Department of Electrical Engineering - Electronic Systems Eindhoven University of Technology Netherlands

ISBN: (纸本)9780769544946

The Ray Tracing rendering algorithm can produce high-fidelity images of 3-D scenes, including shadow effects, as well as reflections and transparencies. This is currently done at a processing speed of at most 30 frames per second. Therefore, actual implementations of the algorithm are not yet suitable for interactive real-time rendering, which is required in games and virtual reality based applications. Fortunately, the algorithm allows for massive parallelization of its computations. In this paper, we present a parallel architecture for ray tracing based on a uniform spatial subdivision of the scene and exploiting an embedded computation of ray-triangle intersections. This approach allows for a significant acceleration of intersection computations, as well as, a reduction of the total number of the required intersections checks. Furthermore, it allows for these checks to be performed in parallel and in advance for each ray. In this paper we discuss and analyze an ASIP-based implementation using FPGAs and a GPGPU-based parallel implementation of the proposed architecture. The performance of both implementations are reported and compared." © 2011 IEEE.

关键词： Ray tracing

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SCAR - Scattering, Concealing and Recovering Data within a DHT

SCAR - Scattering, Concealing and Recovering Data within a D...

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Annual Symposium on Simulation

作者： Bryan N. Mills Taieb F. Znati Department of Computer Science University of Pittsburgh Pittsburgh PA USA Telecommunications Program University of Pittsburgh Pittsburgh PA USA

This paper describes a secure and reliable method for storing data in a distributed hash table (DHT) leveraging the inherent properties of the DHT to provide a secure storage substrate. The framework presented is referred to as ";Scatter, Conceal, and Recover"; (SCAR). The standard method of securing data in a DHT is to encrypt the data using symmetrical encryption before storing it in the network. SCAR provides this level of security, but also prevents any known cryptoanalysis from being performed. It does this by breaking the data into smaller blocks and scattering these blocks throughout the DHT. Hence, SCAR prevents any unauthorized user from obtaining the entire encrypted data block. SCAR uses hash chains to determine the storage locations for these blocks within the DHT. To ensure storage availability, SCAR uses an erasure coding scheme to provide full data recovery given only partial block recovery. This paper first presents the SCAR framework and its associated protocols and mechanisms. The paper then discusses a prototype implementation of SCAR, and presents a simulation-based experimental study. The results show that in order for the erasure coding techniques used by SCAR to be effective, P2P nodes must sufficiently available.

关键词： Scattering Cryptography Availability Secure storage Data privacy Computational modeling Data security Peer to peer computing computer simulation Milling machines

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A simulation framework for the analysis of multicast tree algorithms

A simulation framework for the analysis of multicast tree al...

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Annual Symposium on Simulation

作者： T. Alrabiah T.F. Znati Department of Computer Science University of Pittsburgh Pittsburgh PA USA Telecommunications Program University of Pittsburgh Pittsburgh PA USA

Group communications in high speed networks require the development of efficient multicast algorithms. Finding the optimal multicast routing tree for a subset of a network nodes is an NP-complete problem known as the Steiner Minimal Tree (SMT). Several heuristics were developed to provide an approximate solutions for this problem. The analysis of these heuristics, however, have been limited to specific network topologies. This paper discusses a flexible simulation framework to study the performance of multicasting algorithms in different topologies, including dense and sparse networks. The framework is then used to provide a detailed analysis of the performance of a selected set of path distance heuristics frequently discussed in the literature. The performance of these heuristics as then compared to two new heuristics, namely Normalized Average Distance Heuristic (NADH) and Shared Average Distance Heuristic (SADH). The results show that, on average, NADH outperforms all other heuristics in dense network topologies. The results also show that SADH out-performs the selected set of path distance heuristics for most network topologies.

关键词： Analytical models Algorithm design and analysis Multicast algorithms Routing Network topology Multimedia databases Delay Computational modeling Steiner trees Surface-mount technology

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